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For the Inventor, By the Inventor

Cupertino, CA, United States of America

Ji-Hyoung Yoo

This inventor holds 23 USPTO granted patents and 3 published patent applications, primarily in LDMOS Technology. Top assignees: Monolithic Power Systems, Inc., Micrel, Incorporated, Chengdu Monolithic Power Systems Co., Ltd.. Active years: 2005-2021.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ji-Hyoung Yoo. Retrieved from https://idiyas.com/inventor/ji-hyoung-yoo

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 23 

% Patents Active = 100.0

Average Co-Inventor Count = 2.3

ph-index = 6

Forward Citations = 72(Granted Patents)


Location History:

  • Cupertino, CA (US) (2005 - 2018)
  • Los Gatos, CA (US) (2016 - 2021)

Company Filing History:

goldMedal17 out of 386 
 
Monolithic Power Systems, Inc.
 patents
silverMedal3 out of 388 
 
Micrel, Incorporated
 patents
bronzeMedal2 out of 327 
 
Chengdu Monolithic Power Systems Co., Ltd.
 patents
4. 1 out of 834,513 
Other
 patents

Years Active: 2005-2021

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Areas of Expertise:
Lateral DMOS
Self-Aligned Body
Bipolar Junction Device
Schottky Diodes
High Voltage PMOS
Low Leakage
CMP Technology
Dual Gate Insulation
High Side DMOS
Isolated Resurf LDMOS
Complementary Bipolar Transistors
Gate Layouts
23 patents (USPTO):Explore Patents
1. 11205722 - Lateral DMOS having reduced lateral size (2021-12-21),
2. 11069777 - Manufacturing method of self-aligned DMOS body pickup (2021-07-20),
3. 11049957 - LDMOS device with sinker link (2021-06-29),
4. 10090409 - Method for fabricating LDMOS with self-aligned body (2018-10-02),
5. 10090200 - Bipolar junction semiconductor device and method for manufacturing thereof (2018-10-02),
6. 9941171 - Method for fabricating LDMOS with reduced source region (2018-04-10),
7. 9935176 - Method for fabricating LDMOS using CMP technology (2018-04-03),
8. 9893170 - Manufacturing method of selectively etched DMOS body pickup (2018-02-13),
9. 9893146 - Lateral DMOS and the method for forming thereof (2018-02-13),
10. 9583561 - Schottky diodes with mesh style region and associated methods (2017-02-28),
11. 9502251 - Method for fabricating low-cost isolated resurf LDMOS and associated BCD manufacturing process (2016-11-22),
12. 9219146 - High voltage PMOS and the method for forming thereof (2015-12-22),
13. 9159795 - High side DMOS and the method for forming thereof (2015-10-13),
14. 9087774 - LDMOS device with short channel and associated fabrication method (2015-07-21),
15. 8916913 - High voltage semiconductor device and the associated method of manufacturing (2014-12-23),

Title: The Inventive Mind of Ji-Hyoung Yoo: A Pioneer in Semiconductor Technologies

Introduction:

Ji-Hyoung Yoo, a prolific inventor based in Cupertino, CA, has left an indelible mark in the field of semiconductor technologies. With a substantial portfolio of 23 patents to his name, his innovative contributions continue to shape the industry.

Latest Patents:

Among his most recent patents is the design for a "Lateral DMOS having reduced lateral size." This lateral DMOS features a unique structure with two gate regions, enhancing performance and efficiency. Another notable innovation is his "Manufacturing method of self-aligned DMOS body pickup," a groundbreaking process for creating DMOS devices in semiconductor substrates.

Career Highlights:

Having worked at esteemed companies such as Monolithic Power Systems, Inc. and Micrel, Incorporated, Ji-Hyoung Yoo has honed his expertise in semiconductor technologies. His career is dotted with significant advancements that have pushed the boundaries of innovation in the industry.

Collaborations:

Throughout his journey, Ji-Hyoung Yoo has collaborated with talented professionals like Joel McGregor and Jeesung Jung. These partnerships have been instrumental in bringing cutting-edge ideas to fruition and further establishing his reputation as a visionary inventor.

Conclusion:

In conclusion, Ji-Hyoung Yoo stands as a beacon of innovation in the realm of semiconductor technologies. His inventive spirit, coupled with a relentless pursuit of excellence, continues to drive the industry forward. With an impressive patent portfolio and a legacy of collaboration, he exemplifies the essence of pioneering inventors in the modern era.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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