The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 03, 2018
Filed:
Nov. 18, 2016
Applicant:
Monolithic Power Systems Inc., San Jose, CA (US);
Inventors:
Ji-Hyoung Yoo, Los Gatos, CA (US);
Zeqiang Yao, Santa Clara, CA (US);
Deming Xiao, Los Altos Hills, CA (US);
Assignee:
Monolithic Power Systems, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/266 (2006.01); H01L 29/66 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66583 (2013.01); H01L 21/266 (2013.01); H01L 29/1095 (2013.01); H01L 29/66681 (2013.01);
Abstract
A method for fabricating a LDMOS device in a well region of a semiconductor substrate, including: etching a polysilicon layer above the well region through a window for a body region; and forming spacers at side walls of the polysilicon layer, to define positions of source regions in the well region.