The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 02, 2018
Filed:
Sep. 28, 2016
Monolithic Power Systems, Inc., San Jose, CA (US);
Joel M. McGregor, Issaquah, WA (US);
Deming Xiao, Los Altos Hills, CA (US);
Zeqiang Yao, Santa Clara, CA (US);
Ji-Hyoung Yoo, Los Gatos, CA (US);
Jeesung Jung, San Jose, CA (US);
Monolithic Power Systems, Inc., San Jose, CA (US);
Abstract
A method for fabricating a LDMOS device, including: forming a semiconductor substrate; forming a dielectric layer atop the semiconductor substrate and an electric conducting layer on the dielectric layer; forming a first photoresist layer on the electric conducting layer; patterning the first photoresist layer through a first mask to form a first opening; etching the electric conducting layer through the first opening; implanting dopants of a first doping type into the semiconductor substrate through the first opening to form a first body region adjacent to the surface of the semiconductor substrate, and a second body region located beneath the first body region; removing the first photoresist layer; etching the electric conducting layer using a second photoresist layer and a second mask.