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For the Inventor, By the Inventor

Schoeppenstedt, Germany

Jaroslaw Topp

USPTO Granted Patents = 10 

Average Co-Inventor Count = 5.2

ph-index = 4

Forward Citations = 72(Granted Patents)


Location History:

  • Schoeppenstedt, NL (2017)
  • Schoeppenstedt, DE (2015 - 2019)

Company Filing History:

goldMedal10 out of 54,664 
 
Intel Corporation
 patents

Years Active: 2015-2019

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10 patents (USPTO):
1. 10409763 - Apparatus and method for efficiently implementing a processor pipeline (2019-09-10),
2. 9973417 - Method and apparatus for managing application state in a network interface controller in a high performance computing system (2018-05-15),
3. 9582432 - Instruction and logic for support of code modification in translation lookaside buffers (2017-02-28),
4. 9558121 - Two-level cache locking mechanism (2017-01-31),
5. 9524170 - Instruction and logic for memory disambiguation in an out-of-order processor (2016-12-20),
6. 9436651 - Method and apparatus for managing application state in a network interface controller in a high performance computing system (2016-09-06),
7. 9367477 - Instruction and logic for support of code modification in translation lookaside buffers (2016-06-14),
8. 9311239 - Power efficient level one data cache access with pre-validated tags (2016-04-12),
9. 9158705 - Stride-based translation lookaside buffer (TLB) prefetching with adaptive offset (2015-10-13),
10. 9009413 - Method and apparatus to implement lazy flush in a virtually tagged cache memory (2015-04-14),

Title: Innovations of Jaroslaw Topp

Introduction

Jaroslaw Topp is a notable inventor based in Schoeppenstedt, Germany. He has made significant contributions to the field of high-performance computing and processor design. With a total of 10 patents, Topp's work focuses on enhancing the efficiency and performance of computing systems.

Latest Patents

Among his latest patents, Topp has developed an "Apparatus and method for efficiently implementing a processor pipeline." This invention includes various embodiments such as a method for intelligently allocating threads within a binary translation system, data cache way prediction guided by binary translation code morphing software, and fast interpreter hardware support on the data-side. Additionally, it addresses out-of-order retirement, decoupled load retirement in an atomic out-of-order processor, handling transactional and atomic memory, and speculative memory management in a binary translation-based out-of-order processor.

Another significant patent is the "Method and apparatus for managing application state in a network interface controller in a high-performance computing system." This invention presents methods related to communication between and within nodes in a high-performance computing system. It reduces processing time for message exchange between a processing unit and a network controller interface, minimizes resources required to manage application state, and accelerates virtual to physical address translation using independent caches.

Career Highlights

Jaroslaw Topp is currently employed at Intel Corporation, where he continues to innovate and develop cutting-edge technologies. His work has had a profound impact on the efficiency of computing systems, making him a valuable asset to the company.

Collaborations

Topp has collaborated with notable colleagues such as Fernando Latorre and Steffen Kosinski, contributing to various projects and advancements in technology.

Conclusion

Jaroslaw Topp's contributions to the field of high-performance computing and processor design are noteworthy. His innovative patents and work at Intel Corporation highlight his expertise and commitment to advancing technology.

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