The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 31, 2017

Filed:

Dec. 28, 2012
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Li-Gao Zei, Braunschweig, NL;

Fernando Latorre, Barcelona, ES;

Steffen Kosinski, Braunschweig, NL;

Jaroslaw Topp, Schoeppenstedt, NL;

Varun Mohandru, Braunschweig, NL;

Lutz Naethke, Braunschweig, NL;

Assignee:

INTEL CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 12/08 (2016.01); G06F 12/10 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0846 (2013.01); G06F 12/0864 (2013.01); G06F 12/1063 (2013.01);
Abstract

A virtually tagged cache may be configured to index virtual address entries in the cache into lockable sets based on a page offset value. When a memory operation misses on the virtually tagged cache, only the one set of virtual address entries with the same page offset may be locked. Thereafter, this general lock may be released and only an address stored in the physical tag array matching the physical address and a virtual address in the virtual tag array corresponding to the matching address stored in the physical tag array may be locked to reduce the amount and duration of locked addresses. The machine may be stalled only if a particular memory address request hits and/or tries to access one or more entries in a locked set. Devices, systems, methods, and computer readable media are provided.


Find Patent Forward Citations

Loading…