The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 2015

Filed:

Dec. 21, 2012
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Varun K. Mohandru, Braunschweig, DE;

Fernando Latorre, Barcelona, ES;

Niranjan L. Cooray, Folsom, CA (US);

Pedro Lopez, Molins de Rei, ES;

Naveen Neelakantam, Mountain View, CA (US);

Li-Gao Zei, Braunschweig, DE;

Rami May, Haifa, IL;

Jaroslaw Topp, Schoeppenstedt, DE;

Thomas Gaertner, Braunschweig, DE;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/08 (2006.01); G11C 7/10 (2006.01); G06F 12/10 (2006.01);
U.S. Cl.
CPC ...
G11C 7/1072 (2013.01); G06F 12/0891 (2013.01); G06F 12/0804 (2013.01); G06F 12/1036 (2013.01);
Abstract

A processor includes a processor core including an execution unit to execute instructions, and a cache memory. The cache memory includes a controller to update each of a plurality of stale indicators in response to a lazy flush instruction. Each stale indicator is associated with respective data, and each updated stale indicator is to indicate that the respective data is stale. The cache memory also includes a plurality of cache lines. Each cache line is to store corresponding data and a foreground tag that includes a respective virtual address associated with the corresponding data, and that includes the associated stale indicator. Other embodiments are described as claimed.


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