IDiyas

For the Inventor, By the Inventor

Aloha, OR, United States of America

James W Conary

USPTO Granted Patents = 15

Average Co-Inventor Count = 2.2

ph-index = 10

Forward Citations = 266(Granted Patents)


Location History:

  • Aloha, OR (US) (1996 - 2001)
  • Beaverton, OR (US) (2007 - 2008)

Company Filing History:

goldMedal15 out of 54,664 
 
Intel Corporation
 patents

Years Active: 1996-2008

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15 patents (USPTO):Explore Patents
1. 7345947 - Memory array leakage reduction circuit and method (2008-03-18),
2. 7164616 - Memory array leakage reduction circuit and method (2007-01-16),
3. 6330679 - Input buffer circuit with dual power down functions (2001-12-11),
4. 6298450 - Detecting states of signals (2001-10-02),
5. 6175928 - Reducing timing variance of signals from an electronic device (2001-01-16),
6. 6172546 - Method and apparatus to monitor a characteristic associated with an electronic device (2001-01-09),
7. 6061293 - Synchronous interface to a self-timed memory array (2000-05-09),
8. 5935253 - Method and apparatus for powering down an integrated circuit having a (1999-08-10),
9. 5884068 - Integrated circuit having a core which operates at a speed greater than (1999-03-16),
10. 5842029 - Method and apparatus for powering down an integrated circuit (1998-11-24),
11. 5634117 - Apparatus for operating a microprocessor core and bus controller at a (1997-05-27),
12. 5630146 - Method and apparatus for invalidating a cache while in a low power state (1997-05-13),
13. 5570050 - Zero standby current power-up reset circuit (1996-10-29),
14. 5537581 - Microprocessor with a core that operates at multiple frequencies (1996-07-16),
15. 5481731 - Method and apparatus for invalidating a cache while in a low power state (1996-01-02),
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