The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 24, 1998

Filed:

Jun. 19, 1997
Applicant:
Inventors:

James W Conary, Aloha, OR (US);

Robert R Beutler, Lake Oswego, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
39575004 ;
Abstract

A method and apparatus for powering down a microprocessor in a computer system. The method and apparatus includes a phase locked loop (PLL) circuit, wherein the phase locked loop generates bus clock signals for clocking the operations on the bus and core clock signals for clocking the core of the processor in response to global clock signal of the computer system. The microprocessor includes circuitry for processing data synchronous with the core clock signals. The method and circuit also includes circuitry for placing the processor in a reduced power consumption state in response to the execution of a power down instruction. In this manner, the computer system reduces power consumption.


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