Hyun-Soo Chung

This inventor holds 43 USPTO granted patents and 6 published patent applications, primarily in Semiconductor Packaging. Top assignee: Samsung Electronics Co., Ltd.. Active years: 2007-2023.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hyun-Soo Chung. Retrieved from https://idiyas.com/inventor/hyun-soo-chung

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 43 (Patent Applications = 6)

% Patents Active = 81.4

Average Co-Inventor Count = 4.5

ph-index = 8

Forward Citations = 246(Granted Patents)

Location History:

Gyeonggi-do, KR (2009 - 2012)
Hwasung, KR (2009 - 2013)
Gyunggi-do, KR (2011 - 2013)
Hwaseong-si, KR (2007 - 2023)

Company Filing History:

43 out of 132,108

Samsung Electronics Co., Ltd.

patents

Years Active: 2007-2023

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Areas of Expertise:

Semiconductor Package

Wafer-Level Package

Chip Stack

Redistribution Wiring

Through Silicon Vias

Interconnection Structure

Joint Reliability

Bump Structure

Cooling Path

Fabrication Methods

Multi-Chip Package

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43 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 11705376 - Semiconductor chip including chip pad, redistribution wiring test pad, and redistribution wiring connection pad (2023-07-18),

2. 11189535 - Semiconductor chip including chip pad, redistribution wiring test pad, and redistribution wiring connection pad (2021-11-30),

3. 11031347 - Semiconductor packages (2021-06-08),

4. 10930610 - Semiconductor chip including a bump structure and semiconductor package including the same (2021-02-23),

5. 10840159 - Semiconductor chip including chip pad, redistribution wiring test pad, and redistribution wiring connection pad (2020-11-17),

6. 10438899 - Semiconductor packages (2019-10-08),

7. 10008462 - Semiconductor package (2018-06-26),

8. 9698051 - Semiconductor chips having through silicon vias and related fabrication methods and semiconductor packages (2017-07-04),

9. 9412707 - Method of manufacturing semiconductor package (2016-08-09),

10. 8957526 - Semiconductor chips having through silicon vias and related fabrication methods and semiconductor packages (2015-02-17),

11. 8952543 - Via connection structures, semiconductor devices having the same, and methods of fabricating the structures and devices (2015-02-10),

12. 8735281 - Inter connection structure including copper pad and pad barrier layer, semiconductor device and electronic apparatus including the same (2014-05-27),

13. 8735276 - Semiconductor packages and methods of manufacturing the same (2014-05-27),

14. 8637989 - Semiconductor chip having via electrodes and stacked semiconductor chips interconnected by the via electrodes (2014-01-28),

15. 8482129 - Wafer-level stack package and method of fabricating the same (2013-07-09),

Title: Innovations by Inventor Hyun-Soo Chung in Semiconductor Technology

Introduction: Hyun-Soo Chung, based in Hwaseong-si, South Korea, is a prominent inventor with an impressive portfolio of 43 patents. His expertise lies in semiconductor technology, where his innovations have made significant impacts in the industry.

Latest Patents: Among his latest contributions, Hyun-Soo Chung has developed a semiconductor chip that includes a chip pad, a redistribution wiring test pad, and a redistribution wiring connection pad. This cutting-edge semiconductor chip is designed with a chip pad positioned in the first region of the chip body. It also features a redistribution wiring test pad, strategically placed apart from the chip pad and connected through a redistribution wiring structure. Additionally, the semiconductor chip incorporates a redistribution wiring connection pad, which may be situated in the first or second region of the chip body, also connected to the chip pad via the redistribution wiring structure. This innovation enhances the functionality and efficiency of semiconductor devices.

Career Highlights: Throughout his career, Hyun-Soo Chung has gained valuable experience working with major companies like Samsung Electronics Co., Ltd. His tenure at these influential organizations has allowed him to hone his skills and contribute to the development of advanced semiconductor technologies.

Collaborations: Hyun-Soo Chung has collaborated with talented individuals such as Ho-jin Lee and Dong-Ho Lee. These collaborations have fostered a collaborative environment that drives innovation and results in cutting-edge technology advancements within the semiconductor field.

Conclusion: Hyun-Soo Chung stands out as a leading figure in semiconductor innovation, with numerous patents that underscore his contributions to the field. His dedication to advancing semiconductor technology through collaboration and creativity continues to shape the industry, making his work significant in the pursuit of technological progress.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

6 patents pending: