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For the Inventor, By the Inventor

Palo Alto, CA, United States of America

Hyun-Jin Cho

This inventor holds 45 USPTO granted patents and 1 published patent application, primarily in Semiconductor Technology. Top assignees: Globalfoundries Inc., T-Ram Semiconductor, Inc., Tram, Inc.. Active years: 2002-2020.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hyun-Jin Cho. Retrieved from https://idiyas.com/inventor/hyun-jin-cho

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 45 

% Patents Active = 33.3

Average Co-Inventor Count = 2.3

ph-index = 14

Forward Citations = 931(Granted Patents)


Location History:

  • Palo Alto, CA (US) (2002 - 2017)
  • Guilderland, NY (US) (2016 - 2020)

Company Filing History:

goldMedal19 out of 5,671 
 
Globalfoundries Inc.
 patents
silverMedal10 out of 58 
 
T-Ram Semiconductor, Inc.
 patents
bronzeMedal9 out of 68 
 
Tram, Inc.
 patents
4. 8 out of 166,409 
 
International Business Machines Corporation
 patents
5. 7 out of 13,175 
 
Advanced Micro Devices Corporation
 patents
6. 1 out of 2,891 
 
Stmicroelectronics Gmbh
 patents
where one patent can have more than one assignee

Years Active: 2002-2020

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Areas of Expertise:
Magnetic Tunnel Junctions
Thyristor Devices
Memory Cells
Dynamic Random Access Memory
Conformal Doping
Spacer Chamfering
Lithography Process
Semiconductor Fabrication
FinFET Devices
Charge Leakage Reduction
Integrated Circuits
Device Isolation
45 patents (USPTO):Explore Patents
1. 10586855 - Spacer chamfering gate stack scheme (2020-03-10),
2. 10002940 - Spacer chamfering gate stack scheme (2018-06-19),
3. 9853117 - Spacer chamfering gate stack scheme (2017-12-26),
4. 9780185 - Spacer chamfering gate stack scheme (2017-10-03),
5. 9691971 - Integrated circuits including magnetic tunnel junctions for magnetoresistive random-access memory and methods for fabricating the same (2017-06-27),
6. 9666791 - Topological method to build self-aligned MTJ without a mask (2017-05-30),
7. 9646969 - Spacer chamfering gate stack scheme (2017-05-09),
8. 9613958 - Spacer chamfering gate stack scheme (2017-04-04),
9. 9564440 - Spacer chamfering gate stack scheme (2017-02-07),
10. 9466491 - Methods of forming a semiconductor device with a spacer etch block cap and the resulting device (2016-10-11),
11. 9443775 - Lithography process monitoring of local interconnect continuity (2016-09-13),
12. 9269712 - Semiconductor device providing enhanced fin isolation and related methods (2016-02-23),
13. 9236557 - Magnetic tunnel junction between metal layers of a semiconductor device (2016-01-12),
14. 9190260 - Topological method to build self-aligned MTJ without a mask (2015-11-17),
15. 9129986 - Spacer chamfering for a replacement metal gate device (2015-09-08),

Title: Hyun-Jin Cho: Pioneering Innovations in Semiconductor Technology

Introduction:

Hyun-Jin Cho, a visionary inventor based in Palo Alto, CA, is renowned for his dedication to pushing the boundaries of technology and his relentless pursuit of innovation. With an impressive portfolio of 45 patents, Cho continues to inspire and shape the future of technological advancements in the semiconductor industry.

Latest Patents:

One of Cho's latest groundbreaking patents is the Spacer Chamfering Gate Stack Scheme. This method involves forming spacers on the sidewalls of replacement gate structures on a fin structure, introducing varying widths to enhance semiconductor device performance. By offsetting spacer surfaces and incorporating multiple spacer layers, Cho's innovative approach revolutionizes gate structure formation in semiconductor devices.

Career Highlights:

Throughout his career, Cho has made significant contributions to companies at the forefront of semiconductor technology. Having worked at GlobalFoundries Inc. and T-RAM Semiconductor Inc., Cho has honed his expertise in semiconductor device fabrication and design. His innovative solutions have propelled these companies to the forefront of technological advancements in the industry.

Collaborations:

Collaborating with talented individuals such as Farid Nemati and Scott T. Robins, Cho has leveraged his technical acumen and inventive spirit to drive collaborative projects to success. Together, they have tackled complex challenges in semiconductor technology, paving the way for new innovations and advancements in the field.

Conclusion:

Hyun-Jin Cho's pioneering spirit and relentless pursuit of innovation have established him as a standout figure in the world of inventors. His groundbreaking patents and collaborations reflect his unwavering commitment to pushing the boundaries of technology and shaping the future of the semiconductor industry. Cho's legacy continues to inspire future generations of inventors and innovators to strive for excellence and creativity in their pursuits.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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