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For the Inventor, By the Inventor

Tokyo, Japan

Hiroo Masuda

This inventor holds 28 USPTO granted patents, primarily in Semiconductor Technology. Top assignees: Hitachi, Ltd., Semiconductor Technology Academic Research Center, Other. Active years: 1978-2005.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hiroo Masuda. Retrieved from https://idiyas.com/inventor/hiroo-masuda

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 28

% Patents Active = 96.4

Average Co-Inventor Count = 4.1

ph-index = 10

Forward Citations = 805(Granted Patents)


Location History:

  • Kokubunji, JA (1978)
  • Kokubunji, JP (1979)
  • Nishitama, JP (1987)
  • Kodaira, JP (1983 - 1998)
  • Tokyo, JP (1997 - 2005)

Company Filing History:

goldMedal26 out of 42,731 
 
Hitachi, Ltd.
 patents
silverMedal1 out of 135 
 
Semiconductor Technology Academic Research Center
 patents
bronzeMedal1 out of 834,513 
Other
 patents

Years Active: 1978-2005

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Areas of Expertise:
Semiconductor Memory
FET
Silicon-On-Insulator
Bipolar Device
Dynamic Monolithic Memory
Insulated Gate FET
Programmable Circuitry
Thermal Oxide Isolation
MOS FET
Low Stress Devices
Honeycomb Structure
28 patents (USPTO):Explore Patents
1. 6949387 - Method of designing a semiconductor device (2005-09-27),
2. 6737714 - FET having a gate electrode of a honeycomb structure (2004-05-18),
3. 6620704 - Method of fabricating low stress semiconductor devices with thermal oxide isolation (2003-09-16),
4. 6337517 - Semiconductor device and method of fabricating same (2002-01-08),
5. 6310384 - Low stress semiconductor devices with thermal oxide isolation (2001-10-30),
6. 6063686 - Method of manufacturing an improved SOI (silicon-on-insulator) (2000-05-16),
7. 5889312 - Semiconductor device having circuit element in stress gradient region by (1999-03-30),
8. 5808951 - Semiconductor memory (1998-09-15),
9. 5732037 - Semiconductor memory (1998-03-24),
10. 5689457 - Semiconductor Memory (1997-11-18),
11. 5643805 - Process for producing a bipolar device (1997-07-01),
12. 5619069 - Bipolar device and production thereof (1997-04-08),
13. 5448520 - Semiconductor memory (1995-09-05),
14. 5365478 - Semiconductor memory (1994-11-15),
15. 5170374 - Semiconductor memory (1992-12-08),

Title: Hiroo Masuda: Innovator in Semiconductor Design

Introduction

Hiroo Masuda, based in Tokyo, Japan, is a distinguished inventor who has made significant contributions to the field of semiconductor technology. With an impressive portfolio of 28 patents, his innovative approaches have paved the way for advancements in semiconductor device design and architecture.

Latest Patents

Masuda's latest patents showcase his expertise and creativity in semiconductor innovation. One of his notable inventions is a method for designing a semiconductor device that includes forming circuit regions and device isolation regions on a semiconductor substrate. This technique sets the ratio of the width of a device isolation region to the width of adjacent circuit regions between 2 to 50. Additionally, the design method incorporates precise measurements of various film thicknesses, internal stresses, and a thorough stress analysis to prevent dislocation in the device formation region.

Another significant patent involves a Field-Effect Transistor (FET) featuring a gate electrode designed as a honeycomb structure. This semiconductor device includes a gate electrode formed on a semiconductor substrate, consisting of interconnected hexagonal rings. The design incorporates drain and source diffusion layers strategically placed within the hexagonal structure to enhance performance and efficiency.

Career Highlights

Throughout his career, Hiroo Masuda has worked with notable organizations, including Hitachi, Ltd., where he contributed to groundbreaking projects in semiconductor technology. His extensive experience in the industry has aided in shaping innovative solutions that are now widely recognized.

Collaborations

Masuda has had the opportunity to collaborate with esteemed colleagues, including Katsuhiro Shimohigashi and Kunihiko Ikuzaki. These partnerships have played a crucial role in advancing semiconductor research and development, fostering an environment of knowledge exchange and innovation.

Conclusion

Hiroo Masuda's dedication to innovation in semiconductor design is evident through his numerous patents and successful collaborations. His contributions continue to influence the semiconductor industry by providing advanced techniques and solutions that enhance device performance. As technology evolves, inventors like Masuda remain at the forefront of driving impactful innovations.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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