The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 27, 2005
Filed:
Jul. 25, 2003
Hideo Miura, Koshigaya, JP;
Makoto Ogasawara, Akishima, JP;
Hiroo Masuda, Tokyo, JP;
Jun Murata, Kunitachi, JP;
Noriaki Okamoto, Ibaraki-ken, JP;
Hideo Miura, Koshigaya, JP;
Makoto Ogasawara, Akishima, JP;
Hiroo Masuda, Tokyo, JP;
Jun Murata, Kunitachi, JP;
Noriaki Okamoto, Ibaraki-ken, JP;
Hitachi, Ltd., Tokyo, JP;
Abstract
A technique for a semiconductor device is provided that includes forming circuit regions on a device formation region and device isolation regions on a semiconductor substrate, a ratio of the width of a device isolation region to the width of adjacent circuit regions thereto is set at 2 to 50. A design method is also provided and includes conducting measurements such as of thicknesses of a pad oxide film and a nitride film, the internal stress of the nitride film, the width of both device formation and isolation regions, the depth of the etched portion of the nitride film for forming the groove in a device isolation region, conducting stress analysis in the proximity of the groove due to thermal oxidation, and setting values pertaining to the width of the device formation region and of the device isolation region which do not lead to occurrence of dislocation.