Tokyo, Japan

Harunaka Yamaguchi

This inventor holds 7 USPTO granted patents and 9 published patent applications. Top assignee: Mitsubishi Electric Corporation. Active years: 2016-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Harunaka Yamaguchi. Retrieved from https://idiyas.com/inventor/harunaka-yamaguchi

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 7 

% Patents Active = 85.7

Average Co-Inventor Count = 1.7

ph-index = 1

Forward Citations = 2(Granted Patents)


Company Filing History:


Years Active: 2016-2026

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7 patents (USPTO):Explore Patents

Title: Harunaka Yamaguchi: Innovator in Semiconductor Technology

Introduction

Harunaka Yamaguchi is a prominent inventor based in Tokyo, Japan. He has made significant contributions to the field of semiconductor technology, holding a total of 7 patents. His work focuses on innovative devices and methods that enhance the performance and efficiency of semiconductor components.

Latest Patents

Yamaguchi's latest patents include a semiconductor light-receiving device and a method for manufacturing the same. The light-receiving device features a multiplication layer on an n-type semiconductor substrate that contains aluminum atoms. This device incorporates an electric field control layer of p-type, which includes both high-concentration and low-concentration areas. The optical absorption layer is designed to have a lower impurity concentration than the high-concentration area. Additionally, a window layer of n-type is formed on the optical absorption layer, which has a larger band gap than the optical absorption layer itself. The light-receiving area of p-type is strategically positioned to face the high-concentration area through the window layer and the optical absorption layer. Furthermore, the guard ring area of p-type extends into the optical absorption layer, separated by the window layer.

The method for manufacturing the semiconductor device involves forming an upper layer made of non-doped III-V compound semiconductor on a lower layer of the same material. An impurity source gas is introduced through vapor phase diffusion using an organometallic vapor-phase epitaxy device to add impurities to the upper layer. The process continues with the feed of the impurity source gas either stopped or reduced.

Career Highlights

Harunaka Yamaguchi is currently employed at Mitsubishi Electric Corporation, where he continues to push the boundaries of semiconductor technology. His innovative approaches have garnered attention in the industry and contributed to advancements in electronic devices.

Collaborations

Yamaguchi has collaborated with notable colleagues, including Eiji Nakai and Susumu Hatakenaka. Their combined expertise has fostered a productive environment for innovation and development in semiconductor technologies.

Conclusion

Harunaka Yamaguchi's contributions to semiconductor technology through his patents and collaborations highlight his role as a leading inventor in the field. His work continues to influence advancements in electronic devices and semiconductor manufacturing processes.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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