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Los Altos, CA, United States of America

Han-Rei Ma

USPTO Granted Patents = 19 (Patent Applications = 1)

Average Co-Inventor Count = 4.3

ph-index = 9

Forward Citations = 256(Granted Patents)

Location History:

San Jose, CA (US) (2009)
Los Altos, CA (US) (2005 - 2012)
Mountain View, CA (US) (2013)

Company Filing History:

Aplus Flash Technology, Inc.

Abedneja Assetts Ag L.l.c.

Abedneja Assets Ag L.l.c.

4. 1 out of 832,891

Other

patents

Years Active: 2005-2013

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19 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 8455923 - Embedded NOR flash memory process with NAND cell and true logic compatible low voltage device (2013-06-04),

2. 8237212 - Nonvolatile memory with a unified cell structure (2012-08-07),

3. 7915092 - Nonvolatile memory with a unified cell structure (2011-03-29),

4. 7636252 - Nonvolatile memory with a unified cell structure (2009-12-22),

5. 7372736 - Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout (2008-05-13),

6. 7349257 - Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations (2008-03-25),

7. 7339824 - Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations (2008-03-04),

8. 7324384 - Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout (2008-01-29),

9. 7289366 - Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout (2007-10-30),

10. 7283401 - Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout (2007-10-16),

11. 7154783 - Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations (2006-12-26),

12. 7149120 - Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations (2006-12-12),

13. 7120064 - Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout (2006-10-10),

14. 7110302 - Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout (2006-09-19),

15. 7102929 - Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout (2006-09-05),

Title: The Innovations of Han-Rei Ma: A Pioneer in Nonvolatile Memory Technologies

Introduction: Han-Rei Ma, based in Los Altos, California, is an accomplished inventor known for his significant contributions to the field of nonvolatile memory technologies. With a remarkable total of 19 patents to his name, Ma has consistently pushed the boundaries of innovation in embedded memory and integrated circuitry.

Latest Patents: Among Han-Rei Ma's latest patents are groundbreaking inventions that enhance the functionality of embedded NOR flash memory processes. One of these patents details an integrated circuit formed from a nonvolatile memory array, logic circuits, and linear analog circuits, all arranged on a substrate. This unique arrangement utilizes isolation regions created by a shallow trench isolation method. The NAND-based NOR memory circuits within this invention feature a triple well structure, integrating at least two floating gate transistors, where one serves as a select gate transistor to mitigate leakage current.

Another notable patent presents a novel FLASH-based EEPROM cell and layout scheme, designed to optimize space by eliminating the divided triple-well in the cell array. This innovation allows for byte-erase and byte-program functionalities while being compatible with FLASH and ROM components. The result is a superior monolithic nonvolatile memory solution that meets market demands for flexible and cost-effective write sizes.

Career Highlights: Throughout his career, Han-Rei Ma has worked with several prestigious organizations, including Aplus Flash Technology, Inc. His experience in the industry has provided him with a platform to develop cutting-edge technologies that address critical needs in memory applications.

Collaborations: Han-Rei Ma has collaborated with notable individuals in the field, including Peter Wung Lee and Fu-Chang Hsu. These partnerships have further enhanced the innovation pipeline, contributing to the development of advanced nonvolatile memory solutions.

Conclusion: Han-Rei Ma's extensive portfolio of patents and his pioneering work in memory technologies underscore his significant role as an inventor. His innovative contributions not only advance the field of integrated circuits but also lay the groundwork for future developments in nonvolatile memory systems. With a continued focus on elevating technology, Ma is poised to make further strides in the industry.

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