The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 26, 2006
Filed:
Dec. 14, 2004
Peter W. Lee, Saratoga, CA (US);
Fu-chang Hsu, San Jose, CA (US);
Hsing-ya Tsao, San Jose, CA (US);
Han-rei MA, Los Altos, CA (US);
Peter W. Lee, Saratoga, CA (US);
Fu-Chang Hsu, San Jose, CA (US);
Hsing-Ya Tsao, San Jose, CA (US);
Han-Rei Ma, Los Altos, CA (US);
APlus Flash Technology, Inc., San Jose, CA (US);
Abstract
A combination EEPROM and Flash memory is described containing cells in which the stacked gate transistor of the Flash cell is used in conjunction with a select transistor to form an EEPROM cell. The select transistor is made sufficiently small so as to allow the EEPROM cells to accommodate the bit line pitch of the Flash cell, which facilitates combining the two memories into memory banks containing both cells. The EEPROM cells are erased by byte while the Flash cells erased by block. The small select transistor has a small channel length and width, which is compensated by increasing gate voltages on the select transistor and pre-charge bitline during CHE program operation.