The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 29, 2008
Filed:
May. 26, 2006
Peter W. Lee, Saratoga, CA (US);
Fu-chang Hsu, San Jose, CA (US);
Hsing-ya Tsao, San Jose, CA (US);
Han-rei MA, Los Altos, CA (US);
Koucheng Wu, San Jose, CA (US);
Peter W. Lee, Saratoga, CA (US);
Fu-Chang Hsu, San Jose, CA (US);
Hsing-Ya Tsao, San Jose, CA (US);
Han-Rei Ma, Los Altos, CA (US);
Koucheng Wu, San Jose, CA (US);
Aplus Flash Technology, Inc., San Jose, CA (US);
Abstract
A novel FLASH-based EEPROM cell, decoder, and layout scheme are disclosed to eliminate the area-consuming divided triple-well in cell array and allows byte-erase and byte-program for high P/E cycles. Furthermore, the process-compatible FLASH cell for EEPROM part can be integrated with FLASH and ROM parts so that a superior combo, monolithic, nonvolatile memory is achieved. Unlike all previous arts, the novel combo nonvolatile memory of the present invention of ROM, EEPROM and FLASH or combination of any two is made of one unified, fully compatible, highly-scalable BN+ cell and unified process. In addition, its cell operation schemes have zero array overhead and zero disturbance during P/E operations. The novel combo nonvolatile memory is designed to meet the need in those markets requiring flexible write size in units of bytes, pages and blocks at a lower cost.