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Koucheng Wu

This inventor holds 17 USPTO granted patents. Top assignees: Aplus Flash Technology, Inc., Vlsi Technology, Inc., Integrated Silicon Solution Incorporated. Active years: 1998-2012.

USPTO Granted Patents = 17

% Patents Active = 70.6

Average Co-Inventor Count = 2.2

ph-index = 10

Forward Citations = 261(Granted Patents)

Location History:

San Antonio, TX (US) (1998)
San Jose, CA (US) (1998 - 2012)

Company Filing History:

6 out of 110

Aplus Flash Technology, Inc.

patents

3 out of 1,083

Vlsi Technology, Inc.

patents

2 out of 100

Integrated Silicon Solution Incorporated

patents

4. 1 out of 1

Abedneja Assets Ag L.l.c.

patent

5. 1 out of 1

Abedneja Assetts Ag L.l.c.

patent

6. 1 out of 18

Nexflash Technologies, Inc.

patents

7. 4 out of 834,411

Other

patents

where one patent can have more than one assignee

Years Active: 1998-2012

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17 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 8237212 - Nonvolatile memory with a unified cell structure (2012-08-07),

2. 7915092 - Nonvolatile memory with a unified cell structure (2011-03-29),

3. 7636252 - Nonvolatile memory with a unified cell structure (2009-12-22),

4. 7324384 - Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout (2008-01-29),

5. 7120064 - Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout (2006-10-10),

6. 7110302 - Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout (2006-09-19),

7. 7102929 - Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout (2006-09-05),

8. 7075826 - Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout (2006-07-11),

9. 7042044 - Nor-type channel-program channel-erase contactless flash memory on SOI (2006-05-09),

10. 6963121 - Schottky-barrier tunneling transistor (2005-11-08),

11. 6862223 - MONOLITHIC, COMBO NONVOLATILE MEMORY ALLOWING BYTE, PAGE AND BLOCK WRITE WITH NO DISTURB AND DIVIDED-WELL IN THE CELL ARRAY USING A UNIFIED CELL STRUCTURE AND TECHNOLOGY WITH A NEW SCHEME OF DECODER AND LAYOUT (2005-03-01),

12. 6744111 - Schottky-barrier tunneling transistor (2004-06-01),

13. 6087677 - High density self-aligned antifuse (2000-07-11),

14. 6005810 - Byte-programmable flash memory having counters and secondary storage for (1999-12-21),

15. 5793640 - Capacitance measurement using an RLC circuit model (1998-08-11),

Title: Koucheng Wu: Innovator in Nonvolatile Memory Technology

Introduction

Koucheng Wu is a prominent inventor based in San Jose, California, known for his significant contributions to nonvolatile memory technology. With a total of 17 patents to his name, Wu has made remarkable advancements in the field of memory storage solutions.

Latest Patents

One of Wu's latest patents focuses on a novel FLASH-based EEPROM cell, decoder, and layout scheme. This innovation aims to eliminate the area-consuming divided triple-well in the cell array, allowing for byte-erase and byte-program capabilities that support high program/erase (P/E) cycles. The process-compatible FLASH cell for the EEPROM part can be integrated with FLASH and ROM components, resulting in a superior combo, monolithic, nonvolatile memory solution. Unlike previous technologies, this novel combo nonvolatile memory combines ROM, EEPROM, and FLASH or any two of these components into one unified, fully compatible, and highly scalable BN+ cell and unified process. Additionally, its cell operation schemes feature zero array overhead and zero disturbance during P/E operations. This innovative memory design is tailored to meet the demands of markets requiring flexible write sizes in units of bytes, pages, and blocks at a lower cost.

Career Highlights

Throughout his career, Koucheng Wu has worked with notable companies, including Aplus Flash Technology, Inc. His expertise in memory technology has positioned him as a key player in the industry, contributing to advancements that enhance the efficiency and functionality of memory devices.

Collaborations

Wu has collaborated with esteemed colleagues such as Peter Wung Lee and Fu-Chang Hsu, further enriching his work in the field of nonvolatile memory technology.

Conclusion

Koucheng Wu's innovative contributions to nonvolatile memory technology have established him as a leading inventor in the industry. His patents reflect a commitment to advancing memory solutions that meet the evolving needs of various markets.

Profile summary based on public USPTO records.

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