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For the Inventor, By the Inventor

San Jose, CA, United States of America

Geoffrey W Burr

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This inventor holds 53 USPTO granted patents and 11 published patent applications and 2 EPO patents, primarily in Neural Network Hardware. Top assignees: International Business Machines Corporation, Macronix International Co., Ltd., Polytechnic University of Turin. Active years: 1999-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Geoffrey W Burr. Retrieved from https://idiyas.com/inventor/geoffrey-w-burr

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 53 

% Patents Active = 81.1

 

Average Co-Inventor Count = 2.0

ph-index = 8

Forward Citations = 242(Granted Patents)


Location History:

  • Cupertino, CA (US) (1999 - 2024)
  • San Jose, CA (US) (2019 - 2024)

Company Filing History:

goldMedal53 out of 166,351 
 
International Business Machines Corporation
 patents
silverMedal3 out of 3,609 
 
Macronix International Co., Ltd.
 patents
bronzeMedal1 out of 60 
 
Polytechnic University of Turin
 patents
4. 1 out of 80 
 
Qimonda North America Corporation
 patents
5. 1 out of 965 
 
The University of Chicago
 patents
where one patent can have more than one assignee

Years Active: 1999-2026

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Areas of Expertise:
Neural Networks
Analog Memory
Phase Change Memory
Convolutional Layers
Memory Arrays
Machine Learning
Data Layout
Signal Amplitude
Device Arrays
Element-Wise Operations
Non-Volatile Memory
Synaptic Weights
53 patents (USPTO):Explore Patents
1. 12626111 - Calibrating peripheral variability (2026-05-12),
2. 12596921 - Stochastic bitstream generation with in-situ function mapping (2026-04-07),
3. 12591430 - Digital compute hardware for efficient element-wise and cross-vector maximum operations (2026-03-31),
4. 12518149 - Implicit vector concatenation within 2D mesh routing (2026-01-06),
5. 12456043 - Two-dimensional mesh for compute-in-memory accelerator architecture (2025-10-28),
6. 12450056 - Efficient data layout and alignment for wide-vector accelerator systems (2025-10-21),
7. 12424550 - Buried metal signal rail for memory arrays (2025-09-23),
8. 12255656 - Split pulse width modulation to reduce crossbar array integration time (2025-03-18),
9. 12148682 - Memory cell in wafer backside (2024-11-19),
10. 12111878 - Efficient processing of convolutional neural network layers using analog-memory-based hardware (2024-10-08),
11. 12067481 - Array-integrated upstream/downstream router for circuit switched parallel connectivity (2024-08-20),
12. 12050997 - Row-by-row convolutional neural network mapping for analog artificial intelligence network training (2024-07-30),
13. 12045612 - Special-purpose digital-compute hardware for efficient element-wise aggregation, scaling and offset (2024-07-23),
14. 12019590 - System, method and article of manufacture for synchronization-free transmittal of neuron values in a hardware artificial neural networks (2024-06-25),
15. 11915132 - Synaptic weight transfer between conductance pairs with polarity inversion for reducing fixed device asymmetries (2024-02-27),

Title: The Innovative Journey of Geoffrey W Burr

Introduction: Geoffrey W Burr, a renowned inventor based in San Jose, CA, has made significant contributions to the field of technology through his groundbreaking innovations.

Latest Patents: Geoffrey W Burr holds several patents in the areas of optical data storage and holographic memory technologies, showcasing his expertise and forward-thinking approach to invention.

Career Highlights: With a career spanning over two decades, Geoffrey W Burr has worked with leading tech companies, pioneering new solutions and pushing the boundaries of what is possible in the realm of data storage and retrieval.

Collaborations: Throughout his career, Geoffrey W Burr has collaborated with top researchers, engineers, and scientists, fostering a culture of innovation and excellence in all his projects.

Conclusion: Geoffrey W Burr's passion for innovation and his relentless pursuit of technological advancement continue to inspire the next generation of inventors and shape the future of data storage technologies.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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