The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 31, 2026

Filed:

Jun. 01, 2023
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Geoffrey Burr, Cupertino, CA (US);

Shubham Jain, Elmsford, NY (US);

Yasuteru Kohda, Yamato, JP;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2018.01); G06F 9/355 (2018.01);
U.S. Cl.
CPC ...
G06F 9/30036 (2013.01); G06F 9/30021 (2013.01); G06F 9/3555 (2013.01);
Abstract

A system for efficient element-wise and cross-vector maximum operations. One example system includes an input bus, an output bus, and a memory configured to store N/K elements of an N-element vector in a corresponding row of the memory. A K-wide FMAX( ) comparator has a first set of K-wide inputs of the K-wide FMAX( ) comparator coupled to a read port of the memory and a second set of K-wide inputs of the K-wide FMAX( ) comparator coupled to the input bus, and a set of K-wide outputs of the K-wide FMAX( ) comparator coupled to a write port of the memory. A tree of FMAX( ) comparators comprises an input and an output, the input of the tree coupled to the set of K-wide outputs of the K-wide FMAX( ) comparator and the output of the tree coupled to the output bus.


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