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For the Inventor, By the Inventor

Sant'Agata Li Battiati, Italy

Ferruccio Frisina

This inventor holds 92 USPTO granted patents and 1 published patent application and 6 EPO patents, primarily in Power Semiconductor Devices (CPC class 257341). Top assignees: Stmicroelectronics S.r.l., Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno, Sgs-Thomson Microelectronics S.r.l.. Active years: 1990-2018.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ferruccio Frisina. Retrieved from https://idiyas.com/inventor/ferruccio-frisina

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 92 

% Patents Active = 97.8

 

Average Co-Inventor Count = 2.3

ph-index = 14

Forward Citations = 665(Granted Patents)

Forward Citations (Not Self Cited) = 578(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • Sant' Agata Li Batiati, IT (1999)
  • Sant'agara Li Battiati, IT (1999)
  • 95030 Sant'Agata Li Battiati, IT (2003)
  • Catania, IT (1990 - 2004)
  • Agata li Battiati, IT (2005)
  • Sant′ Agata Li Battiati, IT (2006)
  • Sant'Agata Ii Battiati, IT (2012)
  • Sant'agata, IT (2013)
  • Sant Agata Li Battiati, IT (1996 - 2015)
  • Sant'Agata Li Balliati, IT (2015)
  • S. Agata Li Battiati, IT (1997 - 2018)

Company Filing History:

goldMedal53 out of 5,691 
 
Stmicroelectronics S.r.l.
 patents
silverMedal27 out of 153 
 
Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno
 patents
bronzeMedal24 out of 941 
 
Sgs-Thomson Microelectronics S.r.l.
 patents
4. 1 out of 115 
 
Sgs Microelettronica Spa
 patents
5. 1 out of 5 
 
Sgs-Thomas Microelectronics S.r.l.
 patents
6. 4 out of 834,513 
Other
 patents
where one patent can have more than one assignee

Years Active: 1990-2018

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Areas of Expertise:
Silicon Carbide Wafer
Power MOS Device
Charge-Balance Structures
Integrated Electronic Device
Vertical-Conduction Device
Multi-Drain Power Device
High Voltage MOS
Schottky Diode
Semiconductor Substrate
Electro-Optic Applications
Manufacturing Process
Power Electronic Device
92 patents (USPTO):Explore Patents
1. 10153207 - Method for manufacturing a silicon carbide wafer using a susceptor having draining openings (2018-12-11),
2. 9911810 - Process for manufacturing a semiconductor power device comprising charge-balance column structures and respective device (2018-03-06),
3. 9607859 - Process for manufacturing a semiconductor power device comprising charge-balance column structures and respective device (2017-03-28),
4. 9406504 - Reaction chamber including a susceptor having draining openings for manufacturing a silicon carbide wafer (2016-08-02),
5. 9142646 - Integrated electronic device with edge-termination structure and manufacturing method thereof (2015-09-22),
6. 9099322 - Process for manufacturing a semiconductor power device comprising charge-balance column structures and respective device (2015-08-04),
7. 9018635 - Integrated electronic device with edge-termination structure and manufacturing method thereof (2015-04-28),
8. 8921211 - Vertical-conduction integrated electronic device and method for manufacturing thereof (2014-12-30),
9. 8895370 - Vertical conduction power electronic device and corresponding realization method (2014-11-25),
10. 8866223 - Process for manufacturing a power semiconductor device having charge-balance columnar structures on a non-planar surface, and corresponding power semiconductor device (2014-10-21),
11. 8853779 - Process for manufacturing a power semiconductor device having charge-balance columnar structures on a non-planar surface, and corresponding power semiconductor device (2014-10-07),
12. 8653590 - Vertical-conduction integrated electronic device and method for manufacturing thereof (2014-02-18),
13. 8624332 - Vertical conduction power electronic device and corresponding realization method (2014-01-07),
14. 8580640 - Manufacturing process of a power electronic device integrated in a semiconductor substrate with wide band gap and electronic device thus obtained (2013-11-12),
15. 8482085 - Power MOS electronic device and corresponding realizing method (2013-07-09),

Title: Ferruccio Frisina: Pioneering the Future of Semiconductor Technology

Introduction:

Ferruccio Frisina, a visionary inventor hailing from Sant'Agata Li Battiati, Italy, is a true trailblazer in the realm of semiconductor technology. With an impressive portfolio of 92 patents under his belt, Frisina's dedication to innovation and excellence has left an indelible mark on the industry.

Latest Patents:

Among his latest patents is a groundbreaking method for manufacturing silicon carbide wafers using a susceptor with draining openings. This innovative technique involves the precise formation of semiconductor layers on crystalline substrates, pushing the boundaries of semiconductor material production. Additionally, Frisina's process for manufacturing semiconductor power devices showcases his mastery in epitaxial growth and precise dopant ion control, setting new standards in semiconductor device fabrication.

Career Highlights:

With significant tenure at leading companies such as STMicroelectronics S.r.l. and Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno, Frisina has honed his expertise and made invaluable contributions to the semiconductor industry. His knack for pushing the boundaries of technology and problem-solving skills has solidified his position as a key figure in the field.

Collaborations:

Throughout his illustrious career, Frisina has collaborated with esteemed professionals such as Giuseppe Ferla and Mario Giuseppe Saggio. These partnerships have not only fueled innovation but also led to the development of cutting-edge technologies that continue to shape the semiconductor landscape.

Conclusion:

In conclusion, Ferruccio Frisina's unwavering passion for innovation and relentless pursuit of excellence serve as a beacon for aspiring inventors and entrepreneurs worldwide. His remarkable contributions to semiconductor technology have cemented his legacy as a true pioneer in the field, inspiring generations to come.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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