Fang Wen Tsai

This inventor holds 21 USPTO granted patents, primarily in Semiconductor Packaging. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2008-2021.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Fang Wen Tsai. Retrieved from https://idiyas.com/inventor/fang-wen-tsai

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 21

% Patents Active = 66.7

Average Co-Inventor Count = 5.3

ph-index = 7

Forward Citations = 227(Granted Patents)

Company Filing History:

21 out of 42,872

Taiwan Semiconductor Manufacturing Comp. Ltd.

patents

Years Active: 2008-2021

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Areas of Expertise:

Through Silicon Via

Alignment Marks

Copper Bump Structures

Wafer Alignment

Reconfigurable Guide Pin

Gate FinFET Devices

Low-k Film Adhesion

High Selectivity Etching

21 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 10910267 - Alignment marks in substrate having through-substrate via (TSV) (2021-02-02),

2. 10692764 - Alignment marks in substrate having through-substrate via (TSV) (2020-06-23),

3. 10163706 - Alignment marks in substrate having through-substrate via (TSV) (2018-12-25),

4. 9997497 - Through silicon via structure (2018-06-12),

5. 9633900 - Method for through silicon via structure (2017-04-25),

6. 9478480 - Alignment mark and method of formation (2016-10-25),

7. 9299676 - Through silicon via structure (2016-03-29),

8. 9099515 - Reconfigurable guide pin design for centering wafers having different sizes (2015-08-04),

9. 9093314 - Copper bump structures having sidewall protection layers (2015-07-28),

10. 8980706 - Double treatment on hard mask for gate N/P patterning (2015-03-17),

11. 8952506 - Through silicon via structure (2015-02-10),

12. 8928159 - Alignment marks in substrate having through-substrate via (TSV) (2015-01-06),

13. 8922004 - Copper bump structures having sidewall protection layers (2014-12-30),

14. 8900994 - Method for producing a protective structure (2014-12-02),

15. 8896136 - Alignment mark and method of formation (2014-11-25),

Title: The Innovations of Fang Wen Tsai in Semiconductor Technology

Introduction: Fang Wen Tsai is a renowned inventor based in Hsin-Chu, Taiwan, who has made significant contributions to the field of semiconductor technology. With an impressive portfolio of 21 patents, he is recognized for his innovative approaches to device design and alignment methods that enhance manufacturing efficiency.

Latest Patents: Among his notable inventions are the patents for "Alignment marks in substrate having through-substrate via (TSV)." This device features a substrate equipped with an alignment mark, which includes a conductive through-substrate via (TSV) penetrating through the substrate. This technology is crucial for improving the precision of semiconductor fabrication processes.

Career Highlights: Fang Wen Tsai has a distinguished career at Taiwan Semiconductor Manufacturing Company Limited, where he continues to push the boundaries of technology. His work within this leading semiconductor firm has solidified his reputation as a key contributor to advancements in the industry.

Collaborations: Throughout his career, Fang has collaborated with other prominent engineers and inventors, including his coworkers Wen-Chih Chiou and Shin-Puu Jeng. These collaborations have enabled the fusion of ideas and techniques that have further enriched his innovative projects.

Conclusion: Fang Wen Tsai's work exemplifies the spirit of innovation in the semiconductor industry. With his extensive patent portfolio and collaboration with notable figures in the field, he continues to lead the way in developing technologies that shape the future of electronics. His contributions are invaluable, and his latest patents exemplify the strides being made in semiconductor technology.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]