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For the Inventor, By the Inventor

Fremont, CA, United States of America

Dinesh Maheshwari

This inventor holds 73 USPTO granted patents and 11 published patent applications, primarily in Memory Devices (CPC class H01L). Top assignees: Cypress Semiconductor Corporation, Netlogic Microsystems, Inc, Silicon Light Machines Corporation. Active years: 2003-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Dinesh Maheshwari. Retrieved from https://idiyas.com/inventor/dinesh-maheshwari

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 73 

% Patents Active = 65.8

Average Co-Inventor Count = 1.5

ph-index = 9

Forward Citations = 325(Granted Patents)

Forward Citations (Not Self Cited) = 278(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • Mountain View, CA (US) (2021)
  • Fremont, CA (US) (2003 - 2024)

Company Filing History:

goldMedal26 out of 3,597 
 
Cypress Semiconductor Corporation
 patents
silverMedal17 out of 456 
 
Netlogic Microsystems, Inc
 patents
bronzeMedal13 out of 168 
 
Silicon Light Machines Corporation
 patents
4. 10 out of 230 
 
Zeno Semiconductor, Inc.
 patents
5. 7 out of 72 
 
Groq, Inc.
 patents

Years Active: 2003-2026

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Areas of Expertise:
Memory Devices
Energy Provisioning
Processor Configuration
MOSFET
Content Addressable Memory
Data Transfer Protocol
Multi-Port Memory
Embedded Hardware Acceleration
Lookup Tables
FIFO Memory
High Random Transaction Rate
Static Random Access Memory
73 patents (USPTO):Explore Patents
1. 12757460 - MOSFET and memory cell having improved drain current through back bias application (2026-10-06),
2. 12660683 - Tile structures for multiple die tensor streaming processors (2026-06-16),
3. 12287695 - Energy provisioning (2025-04-29),
4. 12260118 - Deterministic near-compute memory for deterministic processor and enhanced data movement between memory units and processing units (2025-03-25),
5. 12175287 - Processor instruction dispatch configuration (2024-12-24),
6. 12046675 - Memory device comprising an electrically floating body transistor and methods of using (2024-07-23),
7. 11960346 - Energy provisioning (2024-04-16),
8. 11908899 - MOSFET and memory cell having improved drain current through back bias application (2024-02-20),
9. 11868804 - Processor instruction dispatch configuration (2024-01-09),
10. 11769832 - Memory device comprising an electrically floating body transistor and methods of using (2023-09-26),
11. 11489073 - Memory device comprising an electrically floating body transistor and methods of operating (2022-11-01),
12. 11201215 - MOSFET and memory cell having improved drain current through back bias application (2021-12-14),
13. 11165428 - Circuits and methods for updating lookup tables (2021-11-02),
14. 10854745 - Memory device comprising an electrically floating body transistor and methods of using (2020-12-01),
15. 10553683 - MOSFET and memory cell having improved drain current through back bias application (2020-02-04),

Title: Innovations and Contributions of Dinesh Maheshwari in Semiconductor Technology

Introduction

Dinesh Maheshwari is a prominent inventor based in Fremont, California, recognized for his significant contributions to the field of semiconductor technology. With an impressive portfolio of 69 patents, Maheshwari's innovative work has greatly influenced the design and functionality of modern processors and memory devices.

Latest Patents

Among his latest patents, Dinesh Maheshwari has developed a groundbreaking processor instruction dispatch configuration. This invention outlines a processor that consists of a computational array of computational elements and an instruction dispatch circuit. The computational elements effectively receive data operands through data lanes arranged in one dimension and process these operands based on instructions from the instruction dispatch circuit, which utilizes instruction lanes in a second dimension. This intricate system allows for a refined method of instruction processing, wherein the number of processed instructions differs from the original set of raw instructions. These processed instructions are subsequently dispatched to the computational array through multiple instruction queues, enhancing the efficiency and performance of computational tasks.

Additionally, Maheshwari has also created a patent for a memory device featuring an electrically floating body transistor. This semiconductor memory cell is comprised of an electrically floating body that possesses two stable states, offering innovative methods for operating the memory cell and improving memory device design.

Career Highlights

Throughout his career, Dinesh Maheshwari has contributed his expertise to several leading companies in the semiconductor industry, including Cypress Semiconductor Corporation and NetLogic Microsystems, Inc. His experiences in these organizations have helped him develop advanced technologies that have made a lasting impact on the field.

Collaborations

In his journey as an inventor, Dinesh has had the privilege of collaborating with distinguished professionals such as Jin-Woo Han and Yuniarto Widjaja. These partnerships have not only fostered innovation but have also created a dynamic environment for the advancement of semiconductor technology.

Conclusion

Dinesh Maheshwari continues to be a driving force in innovation within the semiconductor sector. His extensive patent portfolio illustrates his ingenuity and dedication to advancing technology. As he continues to push the boundaries of what is possible in processor and memory device design, Maheshwari's contributions will undoubtedly leave an indelible mark on the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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