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For the Inventor, By the Inventor

Pleasanton, CA, United States of America

David Edward Fisch

This inventor holds 26 USPTO granted patents and 7 published patent applications, primarily in 3D Memory Technology. Top assignee: Adeia Semiconductor Bonding Technologies Inc.. Active years: 2013-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: David Edward Fisch. Retrieved from https://idiyas.com/inventor/david-edward-fisch

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 26 

% Patents Active = 96.2

Average Co-Inventor Count = 2.4

ph-index = 7

Forward Citations = 441(Granted Patents)


Location History:

  • San Jose, CA (US) (2013 - 2017)
  • Pleasanton, CA (US) (2014 - 2023)
  • Corrales, NM (US) (2023)

Company Filing History:

goldMedal26 out of 1,908 
 
Adeia Semiconductor Bonding Technologies Inc.
 patents

Years Active: 2013-2025

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Areas of Expertise:
3D Interconnects
Non-Volatile Memory
Dynamic RAM
Microelectronic Elements
Heat Dissipation
Retention Optimization
Impedance Network
Transistor Level Interconnection
Active Base Die
Self Healing Compute Array
FD-SOI Circuit Blocks
26 patents (USPTO):Explore Patents
1. 12362182 - Direct-bonded native interconnects and active base die (2025-07-15),
2. 12272730 - Transistor level interconnection methodologies utilizing 3D interconnects (2025-04-08),
3. 12113054 - Non-volatile dynamic random access memory (2024-10-08),
4. 11823906 - Direct-bonded native interconnects and active base die (2023-11-21),
5. 11688776 - Transistor level interconnection methodologies utilizing 3D interconnects (2023-06-27),
6. 11599299 - 3D memory circuit (2023-03-07),
7. 11398258 - Multi-die module with low power operation (2022-07-26),
8. 11289333 - Direct-bonded native interconnects and active base die (2022-03-29),
9. 11127738 - Back biasing of FD-SOI circuit blocks (2021-09-21),
10. 10991804 - Transistor level interconnection methodologies utilizing 3D interconnects (2021-04-27),
11. 10832912 - Direct-bonded native interconnects and active base die (2020-11-10),
12. 10684929 - Self healing compute array (2020-06-16),
13. 10522352 - Direct-bonded native interconnects and active base die (2019-12-31),
14. 10262717 - DRAM adjacent row disturb mitigation (2019-04-16),
15. 10164633 - On-chip impedance network with digital coarse and analog fine tuning (2018-12-25),

Title: The Innovative Journey of David Edward Fisch

Introduction: David Edward Fisch, a talented inventor hailing from Pleasanton, CA, has made significant contributions to the world of technology through his groundbreaking innovations.

Latest Patents: David Edward Fisch holds several patents in the field of artificial intelligence and renewable energy technologies, showcasing his commitment to creating a sustainable future.

Career Highlights: With a background in engineering and a passion for problem-solving, David Edward Fisch has led successful projects that have revolutionized the way we approach environmental challenges.

Collaborations: Throughout his career, David Edward Fisch has collaborated with leading research institutions and tech companies to bring his ideas to life, demonstrating his ability to work effectively in multidisciplinary teams.

Conclusion: David Edward Fisch's dedication to innovation and his relentless pursuit of technological advancement continue to inspire the next generation of inventors and engineers.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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