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Mount Kisco, NY, United States of America

Darsen D Lu

This inventor holds 37 USPTO granted patents and 1 published patent application, primarily in FinFET Technology. Top assignees: International Business Machines Corporation, Globalfoundries Inc., International Business Corporation. Active years: 2015-2023.

USPTO Granted Patents = 37 (Patent Applications = 1)

% Patents Active = 54.1

Average Co-Inventor Count = 4.9

ph-index = 5

Forward Citations = 69(Granted Patents)

Location History:

Yorktown Heights, NY (US) (2015)
Taichung, TW (2018 - 2021)
Westchester, NY (US) (2018 - 2021)
Mount Kisco, NY (US) (2015 - 2023)

Company Filing History:

33 out of 166,209

International Business Machines Corporation

International Business Corporation

patents

Years Active: 2015-2023

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Areas of Expertise:

FinFET

Dielectric Isolation

Semiconductor Structures

Channel Strain

Decoupling Capacitor

Parasitic Capacitance

Strained Silicon

P-FET

Asymmetric FinFET

Bipolar Junction Transistor

Radiation Tolerant Device

Engineered Substrate

37 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 11728428 - Dielectric isolated fin with improved fin profile (2023-08-15),

2. 10903208 - Distributed decoupling capacitor (2021-01-26),

3. 10892364 - Dielectric isolated fin with improved fin profile (2021-01-12),

4. 10886385 - Semiconductor structures having increased channel strain using fin release in gate regions (2021-01-05),

5. 10734477 - FinFET with reduced parasitic capacitance (2020-08-04),

6. 10593663 - Distributed decoupling capacitor (2020-03-17),

7. 10546955 - Dielectric isolated fin with improved fin profile (2020-01-28),

8. 10347752 - Semiconductor structures having increased channel strain using fin release in gate regions (2019-07-09),

9. 10262991 - Distributed decoupling capacitor (2019-04-16),

10. 10243042 - FinFET with reduced parasitic capacitance (2019-03-26),

11. 10177223 - FinFET with reduced parasitic capacitance (2019-01-08),

12. 10153157 - P-FET with graded silicon-germanium channel (2018-12-11),

13. 10056474 - Semiconductor structures having increased channel strain using fin release in gate regions (2018-08-21),

14. 9997540 - Structure and method for compressively strained silicon germanium fins for pFET devices and tensily strained silicon fins for nFET devices (2018-06-12),

15. 9966387 - Strain release in pFET regions (2018-05-08),

Title: Spotlight on Inventor Darsen D Lu

Introduction:

Darsen D Lu, a prolific inventor based in Mount Kisco, NY, has made significant contributions to the field of semiconductor technology. With an impressive portfolio of 37 patents, Lu's innovative work has advanced the development of cutting-edge electronic devices.

Latest Patents:

1. Dielectric isolated fin with improved fin profile: Lu's method for forming a fin structure involves creating dielectric spacers and semiconductor spacers on each fin structure, enhancing performance and efficiency.

2. Distributed decoupling capacitor: Lu's electrical device features unique fin structures that include decoupling fins and semiconductor fins, along with innovative decoupling capacitor designs for optimized functionality.

Career Highlights:

Having worked at esteemed companies such as IBM and Globalfoundries Inc., Lu has gained invaluable experience and expertise in the semiconductor industry. His groundbreaking research has paved the way for technological advancements and has been instrumental in shaping the future of electronic devices.

Collaborations:

Lu has collaborated with respected professionals in the field, including Kangguo Cheng and Ali Khakifirooz. Through partnerships and teamwork, he has been able to drive innovation and achieve remarkable results in semiconductor technology.

Conclusion:

Inventor Darsen D Lu's remarkable creativity and dedication to advancing semiconductor technology have earned him a well-deserved reputation as a pioneer in the industry. His patented inventions continue to have a significant impact on electronic devices and pave the way for future innovations.

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