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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10886385 B1

PDFFull Text
Date of Patent:
Jan. 05, 2021

Filed:

Apr. 05, 2019

Semiconductor structures having increased channel strain using fin release in gate regions

Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Kangguo Cheng, Schenectady, NY (US);

Bruce B. Doris, Slingerlands, NY (US);

Ali Khakifirooz, Los Altos, CA (US);

Darsen D. Lu, Westchester, NY (US);

Alexander Reznicek, Troy, NY (US);

Kern Rim, Westchester, NY (US);

Assignee:

INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US);

Attorneys:

Cantor Colburn LLP

Douglas Pearson

Primary Examiner:

Bradley Smith

Assistant Examiner:

David J Goodwin

Int. Cl.
CPC ...
H01L 27/092 (2006.01); H01L 21/8234 (2006.01); H01L 21/8238 (2006.01); H01L 29/66 (2006.01); H01L 29/165 (2006.01); H01L 21/84 (2006.01); H01L 29/78 (2006.01); H01L 21/02 (2006.01); H01L 21/033 (2006.01); H01L 21/32 (2006.01); H01L 21/324 (2006.01); H01L 29/10 (2006.01); H01L 29/161 (2006.01);
U.S. Cl.
CPC ...
H01L 29/6681 (2013.01); H01L 21/02532 (2013.01); H01L 21/0332 (2013.01); H01L 21/32 (2013.01); H01L 21/324 (2013.01); H01L 21/823807 (2013.01); H01L 21/823821 (2013.01); H01L 21/845 (2013.01); H01L 29/1033 (2013.01); H01L 29/161 (2013.01); H01L 29/165 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 29/7848 (2013.01); H01L 29/7849 (2013.01);
Abstract

A method of introducing strain in a channel region of a FinFET device includes forming a fin structure on a substrate, the fin structure having a lower portion comprising a sacrificial layer and an upper portion comprising a strained semiconductor layer; and removing a portion of the sacrificial layer corresponding to a channel region of the FinFET device so as to release the upper portion of the fin structure from the substrate in the channel region.

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