The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 11, 2018

Filed:

Aug. 26, 2015
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Kangguo Cheng, Schenectady, NY (US);

Ali Khakifirooz, Los Altos, CA (US);

Darsen D. Lu, Taichung, TW;

Alexander Reznicek, Troy, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 21/02 (2006.01); H01L 29/161 (2006.01); H01L 21/306 (2006.01); H01L 21/225 (2006.01); H01L 29/10 (2006.01); H01L 29/165 (2006.01); H01L 29/16 (2006.01); H01L 29/36 (2006.01); H01L 21/762 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01);
U.S. Cl.
CPC ...
H01L 21/0251 (2013.01); H01L 21/0245 (2013.01); H01L 21/0262 (2013.01); H01L 21/02532 (2013.01); H01L 21/02612 (2013.01); H01L 21/02634 (2013.01); H01L 21/02664 (2013.01); H01L 21/2251 (2013.01); H01L 21/30604 (2013.01); H01L 21/7624 (2013.01); H01L 27/1211 (2013.01); H01L 29/1054 (2013.01); H01L 29/16 (2013.01); H01L 29/161 (2013.01); H01L 29/165 (2013.01); H01L 29/36 (2013.01); H01L 29/66742 (2013.01); H01L 29/66795 (2013.01); H01L 29/78684 (2013.01); H01L 29/78696 (2013.01);
Abstract

A method of forming a semiconductor structure includes forming a silicon-germanium layer on a semiconductor region of a substrate having a specific concentration of germanium atoms. The semiconductor region and the silicon-germanium layer are annealed to induce a non-homogenous thermal diffusion of germanium atoms from the silicon-germanium layer into the semiconductor region to form a graded silicon-germanium region. Another method of forming a semiconductor structure includes etching a semiconductor region of the substrate to form a thinned semiconductor region. A silicon-germanium layer is formed on the thinned semiconductor region having a graded germanium concentration profile.


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