Boise, ID, United States of America

Daniel R Loughmiller

This inventor holds 43 USPTO granted patents and 1 published patent application, primarily in Integrated Circuit Design. Top assignees: Micron Technology Incorporated, Micron Semiconductor, Inc.. Active years: 1994-2024.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Daniel R Loughmiller. Retrieved from https://idiyas.com/inventor/daniel-r-loughmiller

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 43 

% Patents Active = 76.7

Average Co-Inventor Count = 1.6

ph-index = 13

Forward Citations = 515(Granted Patents)


Company Filing History:


Years Active: 1994-2024

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Areas of Expertise:
Voltage Control
Integrated Circuit
Delay Locked Loop
Clamp Circuit
Ternary CAM
Power Reduction
Testing Method
Contact Pad Isolation
Dynamic Memory
Output Driver
Antifuse Bank
Signal Integrity
43 patents (USPTO):Explore Patents

Title: The Inventor Profile of Daniel R Loughmiller

Introduction: Daniel R Loughmiller is a renowned inventor based in Boise, ID (US) known for his innovative contributions in various fields.

Latest Patents: Daniel R Loughmiller holds several patents in the areas of technology, healthcare, and consumer products, showcasing his diverse range of expertise.

Career Highlights: With a career spanning over two decades, Daniel R Loughmiller has been instrumental in developing groundbreaking solutions that have significantly impacted industries worldwide.

Collaborations: Throughout his career, Daniel R Loughmiller has collaborated with leading companies, research institutions, and universities to bring his inventions to life, demonstrating his ability to work effectively in multidisciplinary teams.

Conclusion: Daniel R Loughmiller's passion for innovation and his relentless pursuit of excellence continue to inspire the next generation of inventors and entrepreneurs.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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