The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 18, 2004
Filed:
Aug. 29, 2002
Applicant:
Inventors:
Tyler J. Gomm, Meridian, ID (US);
Travis E. Dirkes, Bozeman, MT (US);
Ross E. Dermott, Bozeman, MT (US);
Daniel R. Loughmiller, Boise, ID (US);
Scott E. Smith, Plano, TX (US);
Assignee:
Micron Technology, Inc., Boise, ID (US);
Primary Examiner:
Int. Cl.
CPC ...
H03D 3/24 ;
U.S. Cl.
CPC ...
H03D 3/24 ;
Abstract
A delay locked loop circuit includes a plurality of delay cells connected in series. Each of the delay cells connects to an input node which provides a clock signal. A shift register selects one of the delay cells to allow the clock signal to enter the selected delay cell and propagate to an output node, such that internal gates of delay cells preceding the selected delay cell are not toggling.