Denver, CO, United States of America

Daniel P Kirkwood

This inventor holds 7 USPTO granted patents. Top assignee: Xilinx, Inc.. Active years: 2008-2009.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Daniel P Kirkwood. Retrieved from https://idiyas.com/inventor/daniel-p-kirkwood

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 5.0

ph-index = 4

Forward Citations = 27(Granted Patents)


Company Filing History:


Years Active: 2008-2009

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7 patents (USPTO):Explore Patents

Title: Innovations of Daniel P. Kirkwood

Introduction

Daniel P. Kirkwood is a notable inventor based in Denver, CO (US). He has made significant contributions to the field of programmable logic devices, holding a total of 7 patents. His work has advanced the technology used in various electronic applications.

Latest Patents

Kirkwood's latest patents include a method for constructing a model of a programmable logic device (PLD) design. This involves inputting a netlist that describes the PLD design and identifying programmable tile modules that include programmable resources. He has also developed a method for determining networks of a tile module of a PLD design, which includes inputting characterization data for sub-modules and determining connectivity pins.

Career Highlights

Kirkwood is currently employed at Xilinx, Inc., where he continues to innovate in the field of programmable logic. His work has been instrumental in enhancing the capabilities of programmable devices, making them more efficient and versatile.

Collaborations

Some of his notable coworkers include Bart Reynolds and Keith R. Bean, who have collaborated with him on various projects within the company.

Conclusion

Daniel P. Kirkwood's contributions to the field of programmable logic devices have made a lasting impact on technology. His innovative patents and work at Xilinx, Inc. continue to shape the future of electronic design.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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