Shanghai, China

Dae-Sub Jung

This inventor holds 7 USPTO granted patents and 1 published patent application and 1 EPO patent. Top assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation, Semiconductor Manufacturing (Beijing) Intel Corporation. Active years: 2017-2023.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Dae-Sub Jung. Retrieved from https://idiyas.com/inventor/dae-sub-jung-xdili99r

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 7 

% Patents Active = 100.0

 

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 2(Granted Patents)


Company Filing History:


Years Active: 2017-2023

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7 patents (USPTO):Explore Patents

Title: Dae-Sub Jung: Innovator in Semiconductor Technology

Introduction

Dae-Sub Jung is a prominent inventor based in Shanghai, China. He has made significant contributions to the field of semiconductor technology, holding a total of seven patents. His work focuses on innovative methods and structures that enhance the performance and efficiency of semiconductor devices.

Latest Patents

Among his latest patents is a method for forming a semiconductor structure. This method involves providing a substrate with distinct regions, forming fin structures, and creating an isolation structure between them. Additionally, it includes the formation of a mask layer and a gate structure that covers the first region of the substrate. Another notable patent is for an LDMOS device and its manufacturing method. This device features a substrate with a drift region, a gate structure, and an isolation structure that improves device breakdown voltage without increasing Rdson.

Career Highlights

Dae-Sub Jung has worked with leading companies in the semiconductor industry, including Semiconductor Manufacturing International Corporation in Shanghai and Beijing. His experience in these organizations has allowed him to develop and refine his innovative ideas in semiconductor technology.

Collaborations

Throughout his career, Dae-Sub has collaborated with notable colleagues such as Deyan Chen and De Yan Chen. These partnerships have contributed to the advancement of his research and the successful development of his patents.

Conclusion

Dae-Sub Jung is a key figure in semiconductor innovation, with a strong portfolio of patents that reflect his expertise and dedication to the field. His contributions continue to shape the future of semiconductor technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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