Sunnyvale, CA, United States of America

Chin S Park

This inventor holds 8 USPTO granted patents. Top assignee: Intel Corporation. Active years: 1991-2026.


% Patents Active = 100.0

Average Co-Inventor Count = 1.6

ph-index = 6

Forward Citations = 191(Granted Patents)


Location History:

  • Sunnyvale, CA (US) (1991 - 1992)
  • Palo Alto, CA (US) (1996 - 2004)

Company Filing History:


Years Active: 1991-2026

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8 patents (USPTO):Explore Patents

Title: Innovations of Chin S Park

Introduction

Chin S Park is a notable inventor based in Sunnyvale, CA. He has made significant contributions to the field of integrated circuits and frequency tuning. With a total of 8 patents, his work has advanced the technology used in various electronic applications.

Latest Patents

One of his latest patents is titled "Automatic on-die frequency tuning using tunable replica circuits." This invention relates to optimizing the operation of multiple integrated circuits (ICs) operating in parallel. In this patent, the ICs are arranged in a voltage-stacked configuration, and the operating frequency of each IC is controlled using a tunable replica circuit to stabilize its voltage drop. The tunable replica circuit mimics a critical path on the IC. Additionally, the IC is divided into top and bottom portions, which are in respective voltage domains on a substrate that includes a deep n-well region for the higher voltage domain. Another aspect of this patent involves using a physically unclonable function (PUF) to generate identifiers for each IC among multiple ICs on a board. Entropy sources of the PUF generate bits of the identifiers, while unstable entropy sources are identified and their bits are masked out.

Another significant patent is the "System and method for extending delay-locked loop frequency application range." This invention includes a delay-locked loop with an override controller that manages the frequency range within which the loop operates. The controller adjusts this range based on the output of a detector that compares a phase error between input and output frequency signals to a predetermined range. If the phase error lies outside this range, the controller disables a phase detector to allow the input signal delay to be adjusted based on the output of the range detector. Delay adjustments may be iteratively performed until the phase error is within the predetermined range, allowing for customized applications that surpass the operational limitations of conventional loops.

Career Highlights

Chin S Park is currently employed at Intel Corporation, where he continues to innovate and develop new technologies. His work has been instrumental in enhancing the performance and efficiency of integrated circuits.

Collaborations

He has collaborated with notable coworkers such as Sanu K Mathew and Siang-Chun The, contributing to various projects and advancements in the field.

Conclusion

Chin S Park's contributions to the field of integrated circuits and frequency tuning have made a

Profile summary based on public USPTO records.
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