The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 23, 1996
Filed:
Jul. 01, 1993
Chin S Park, Palo Alto, CA (US);
Mark A Holler, Palo Alto, CA (US);
Jay M Diamond, San Jose, CA (US);
Siang-Chun The, Fremont, CA (US);
Umberto Santoni, Scottsdale, AZ (US);
Kenneth R Buckmann, San Jose, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
An adaptive distance calculating neural network classifier chip accepts high dimensionality input pattern vectors with up to 256 5-bit elements per vector and compares the input vector with up to 1024 prototype vectors stored on-chip by calculating the distance between the input vector and each of the prototype vectors. The classifier further provides for identifying up to 64 classes to which the prototype vectors belong. If the distance between input and prototype vector is less than a programmable threshold distance, the prototype fires and the class to which it belongs is identified. If prototype vectors belonging to more than one class fire, a probabilistic model based on Parzen windows may be invoked to resolve the classification by providing the relative probabilities of various class membership. The classifier chip is trainable by supplying appropriate training vectors and associated class membership. Distance and probability parameters are generated during training and are stored for use in the classification mode. Incremental training is also provided so that additional prototypes may be added to an existing base. In order to extend the classifier capacity, multichip operation is provided under the supervision of a system administrator controller/CPU.