The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 12, 2004
Filed:
Jan. 31, 2003
Chin S. Park, Palo Alto, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A delay-locked loop includes an override controller for controlling the frequency range within which the loop operates. The override controller controls this range based on the output of a detector which compares a phase error between input and output frequency signals to a predetermined range. If the phase error lies outside this range, the controller disables a phase detector to allow the input signal delay to be adjusted based on the output of the range detector. Delay adjustments may be iteratively performed until the range detector determines that the phase error lies within the predetermined range. At this point, the override controller activates the phase detector, and the phase detector is allowed to control further delay adjustments until the phase error is eliminated or reduced, for example, to within tolerable limits. By setting the phase-error range, the delay-locked loop maybe customized to satisfy the requirements of a variety of applications and further maybe set to surpass the operational limitations of conventional loops.