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Chienkuang Chen

USPTO Granted Patents = 11 (Patent Applications = 1)

Average Co-Inventor Count = 4.1

ph-index = 5

Forward Citations = 129(Granted Patents)

Location History:

Sunnyvale, CA (US) (2003 - 2006)
Guangdong, CN (2018)
Foshan, CN (2021)
Santa Clara, CA (US) (2021 - 2024)

Company Filing History:

5 out of 755

Lattice Semiconductor Corporation

patents

5 out of 45

Gowin Semiconductor Corporation

patents

1 out of 1

Guangdong Gowin Semiconductor Corporation, Ltd.

patent

Years Active: 2003-2024

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11 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12038781 - Method and system for organizing programmable semiconductor device into multiple clock regions (2024-07-16),

2. 11614770 - Methods and apparatus for organizing a programmable semiconductor device into multiple clock regions (2023-03-28),

3. 11216022 - Methods and apparatus for providing a clock fabric for an FPGA organized in multiple clock regions (2022-01-04),

4. 11157421 - System level integrated circuit chip (2021-10-26),

5. 11043950 - Method and system for providing a configurable logic device having a programmable DSP block (2021-06-22),

6. 10003339 - General purpose interface circuit compatible with output of MIPI signals (2018-06-19),

7. 7003066 - Digital phase locked loop with phase selector having minimized number of phase interpolators (2006-02-21),

8. 6999543 - Clock data recovery deserializer with programmable SYNC detect logic (2006-02-14),

9. 6861868 - High speed interface for a programmable interconnect circuit (2005-03-01),

10. 6661254 - Programmable interconnect circuit with a phase-locked loop (2003-12-09),

11. 6650141 - High speed interface for a programmable interconnect circuit (2003-11-18),

Title: Innovations of Chienkuang Chen

Introduction

Chienkuang Chen is a prominent inventor based in Sunnyvale, CA, known for his significant contributions to the field of semiconductor technology. With a total of 11 patents to his name, Chen has made remarkable advancements in the organization and functionality of programmable semiconductor devices.

Latest Patents

Chen's latest patents include a method and system for organizing a programmable semiconductor device into multiple clock regions. This innovative approach allows a configurable semiconductor device (CSD) to be organized into four quadrants, each capable of performing user-defined logic functions through a clock fabric. The first quadrant features a serializer and deserializer (SerDes) region along with a bank0 region for data processing. The second quadrant contains a second SerDes region and a bank5 region, while the third quadrant includes bank3 and bank4 regions. Finally, the fourth quadrant is composed of bank1 and bank2 regions. The clock fabric is designed to provide a set of programmable or selectable clock signals with varying speeds to different regions within the CSD.

Career Highlights

Throughout his career, Chienkuang Chen has worked with notable companies such as Lattice Semiconductor Corporation and Gowin Semiconductor Corporation. His expertise in semiconductor technology has positioned him as a key player in the industry, contributing to the development of advanced solutions.

Collaborations

Chen has collaborated with talented individuals in the field, including Jinghui Zhu and Kuang Chi. These partnerships have fostered innovation and have led to the successful development of various projects.

Conclusion

Chienkuang Chen's work in the semiconductor industry exemplifies the spirit of innovation and creativity. His patents and collaborations have significantly impacted the field, showcasing his dedication to advancing technology.

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