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For the Inventor, By the Inventor

Hsinchu, Taiwan

Chien Ling Hwang

USPTO Granted Patents = 101 

Average Co-Inventor Count = 4.3

ph-index = 8

Forward Citations = 1,258(Granted Patents)

Forward Citations (Not Self Cited) = 1,230(Dec 10, 2025)


Inventors with similar research interests:


Company Filing History:

goldMedal100 out of 40,780 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents
silverMedal1 out of 117 
 
TSMC Solid State Lighting Ltd.
 patents

Years Active: 2011-2025

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Areas of Expertise:
Integrated Circuit Packaging
Fan-Out Packaging
Wafer Level Transfer Molding
Anisotropic Carrier
Three-Dimensional Integrated Circuit
Semiconductor Device Manufacturing
Warpage Control Methods
Bonding Structures
Cu Pillar Bump Technology
Pick-and-Place Tool
Mechanical Braces in Packaging
Boundary Structure in Semiconductors
101 patents (USPTO):Explore Patents
1. 12463175 - Bonding with pre-deoxide process and apparatus for performing the same (2025-11-04),
2. 12300659 - Aligning bumps in fan-out packaging process (2025-05-13),
3. 12300571 - Integrated circuit package and method (2025-05-13),
4. 11990381 - Integrated circuit packages having support rings (2024-05-21),
5. 11955349 - Anisotropic carrier for high aspect ratio fanout (2024-04-09),
6. 11538735 - Method of forming integrated circuit packages with mechanical braces (2022-12-27),
7. 11502013 - Integrated circuit package and method (2022-11-15),
8. 11410953 - Via structure for packaging and a method of forming (2022-08-09),
9. 11393701 - Anisotropic carrier for high aspect ratio fanout (2022-07-19),
10. 11390000 - Wafer level transfer molding and apparatus for performing the same (2022-07-19),
11. 11342302 - Bonding with pre-deoxide process and apparatus for performing the same (2022-05-24),
12. 11257714 - Method of making a pillar structure having a non-metal sidewall protection structure and integrated circuit including the same (2022-02-22),
13. 11217555 - Aligning bumps in fan-out packaging process (2022-01-04),
14. 11133274 - Fan-out interconnect structure and method for forming same (2021-09-28),
15. 11024618 - Wafer-level underfill and over-molding (2021-06-01),

Certainly! Here is an article about inventor Chien Ling Hwang based on the data provided:

Title: The Innovative Mind of Chien Ling Hwang

Introduction:

Chien Ling Hwang, a prolific inventor hailing from Hsinchu, Taiwan, has made a significant impact in the field of technology with a remarkable portfolio of 97 patents.

Latest Patents:

Among his latest patents is the development of an Anisotropic carrier for high aspect ratio fanout, revolutionizing the encapsulation process in device dies. Additionally, his Method of forming integrated circuit packages with mechanical braces showcases his expertise in enhancing structural integrity in electronic components.

Career Highlights:

Having a rich professional journey, Chien Ling Hwang has lent his expertise to renowned companies such as Taiwan Semiconductor Manufacturing Company Limited (TSMC) and TSMC Solid State Lighting Ltd., where he has consistently pushed the boundaries of innovation in semiconductor technology.

Collaborations:

Throughout his career, Chien Ling Hwang has collaborated with esteemed professionals like Chung-Shi Liu and Chen-Hua Douglas Yu, fostering a culture of innovation and knowledge exchange in the industry.

Conclusion:

In conclusion, Chien Ling Hwang's relentless pursuit of innovation and his numerous patents stand as a testament to his influential contributions to the technological landscape. His inventive spirit continues to inspire future generations in the field of semiconductor technology.

I hope you find this article insightful and engaging! If you need more information or have any other requests, feel free to ask.

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