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For the Inventor, By the Inventor

Cupertino, CA, United States of America

Cheng-Hsiung Matthew Tsai

This inventor holds 19 USPTO granted patents and 7 published patent applications, primarily in Semiconductor Packaging. Top assignee: Applied Materials, Inc.. Active years: 2015-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Cheng-Hsiung Matthew Tsai. Retrieved from https://idiyas.com/inventor/cheng-hsiung-matthew-tsai

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 19 

% Patents Active = 100.0

Average Co-Inventor Count = 4.1

ph-index = 6

Forward Citations = 99(Granted Patents)


Company Filing History:

goldMedal19 out of 14,482 
 
Applied Materials, Inc.
 patents

Years Active: 2015-2026

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Areas of Expertise:
Electrostatic Chuck
PVD Chamber
Substrate Support
Process Chamber
Wafer Surface Treatment
High Temperature Applications
Deposition Ring
Plasma Etch Operations
Calibration Methods
Lift Pin Assembly
Shutter Disk Assembly
19 patents (USPTO):Explore Patents
1. 12735789 - Pocket heater with purge to improve gap tolerance (2026-09-15),
2. 12665166 - Process chamber and process kits for advanced packaging (2026-06-23),
3. D1128616 - Substrate support for a substrate processing chamber (2026-06-02),
4. D1071886 - Substrate support for a substrate processing chamber (2025-04-21),
5. 12228395 - Substrate position calibration for substrate supports in substrate processing systems (2025-02-18),
6. D1040304 - Deposition ring for physical vapor deposition chamber (2024-08-27),
7. 12014906 - High temperature detachable very high frequency (VHF) electrostatic chuck (ESC) for PVD chamber (2024-06-18),
8. 11961723 - Process kit having tall deposition ring for PVD chamber (2024-04-16),
9. 11955362 - Substrate support for reduced damage substrate backside (2024-04-09),
10. 11939666 - Methods and apparatus for precleaning and treating wafer surfaces (2024-03-26),
11. 11887878 - Detachable biasable electrostatic chuck for high temperature applications (2024-01-30),
12. D960216 - Base plate for a processing chamber substrate support (2022-08-09),
13. D947914 - Base plate for a processing chamber substrate support (2022-04-05),
14. 10892180 - Lift pin assembly (2021-01-12),
15. 10593521 - Substrate support for plasma etch operations (2020-03-17),

Title: Cheng-Hsiung Matthew Tsai: Innovator in Substrate Processing Technologies

Introduction

Cheng-Hsiung Matthew Tsai is a prominent inventor based in Cupertino, CA (US). He has made significant contributions to the field of substrate processing, holding a total of 19 patents. His work focuses on enhancing the efficiency and accuracy of substrate processing systems.

Latest Patents

Among his latest patents are innovative technologies such as "Substrate support for a substrate processing chamber," "Substrate position calibration for substrate supports in substrate processing systems," and "Methods and apparatus for substrate position calibration for substrate supports in substrate processing systems." These patents provide methods for accurately positioning substrates on supports, which is crucial for various manufacturing processes.

Career Highlights

Cheng-Hsiung Matthew Tsai is currently employed at Applied Materials, Inc., a leading company in the semiconductor and display industries. His expertise in substrate processing has positioned him as a key player in the development of advanced manufacturing technologies.

Collaborations

He has collaborated with notable colleagues such as Steven Victor Sansoni and Mukund Sundararajan, contributing to a dynamic work environment that fosters innovation and technological advancement.

Conclusion

Cheng-Hsiung Matthew Tsai's contributions to substrate processing technologies have made a significant impact in the industry. His innovative patents and collaborative efforts continue to drive advancements in manufacturing processes.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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