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For the Inventor, By the Inventor

Dresden, Germany

Carsten Peters

This inventor holds 28 USPTO granted patents and 1 published patent application, primarily in Semiconductor Devices. Top assignees: Advanced Micro Devices Corporation, Globalfoundries Inc., Globalfoundries U.S. Inc.. Active years: 2008-2021.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Carsten Peters. Retrieved from https://idiyas.com/inventor/carsten-peters

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 28 

% Patents Active = 78.6

Average Co-Inventor Count = 3.2

ph-index = 6

Forward Citations = 471(Granted Patents)


Company Filing History:

goldMedal15 out of 13,192 
 
Advanced Micro Devices Corporation
 patents
silverMedal12 out of 5,671 
 
Globalfoundries Inc.
 patents
bronzeMedal1 out of 1,103 
 
Globalfoundries U.S. Inc.
 patents

Years Active: 2008-2021

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Areas of Expertise:
Silicon/Germanium Active Regions
Integrated Circuits
Contact Structures
Leakage Currents
Interlayer Dielectric Material
Nano Imprint Technique
Barrier Polish Stop Layers
Densifying Interlevel Dielectric
Mechanical Strain
Metallization Layer
Conductive Barrier Layer
Field Effect Transistors
28 patents (USPTO):Explore Patents
1. 11031406 - Semiconductor devices having silicon/germanium active regions with different germanium concentrations (2021-06-08),
2. 10522555 - Semiconductor devices including Si/Ge active regions with different Ge concentrations (2019-12-31),
3. 10483154 - Front-end-of-line device structure and method of forming such a front-end-of-line device structure (2019-11-19),
4. 10157774 - Contact scheme for landing on different contact area levels (2018-12-18),
5. 9305878 - Integrated circuits and methods for fabricating integrated circuits with capping layers between metal contacts and interconnects (2016-04-05),
6. 9257329 - Methods for fabricating integrated circuits including densifying interlevel dielectric layers (2016-02-09),
7. 8932911 - Integrated circuits and methods for fabricating integrated circuits with capping layers between metal contacts and interconnects (2015-01-13),
8. 8772154 - Integrated circuits including barrier polish stop layers and methods for the manufacture thereof (2014-07-08),
9. 8580684 - Contact elements of semiconductor devices comprising a continuous transition to metal lines of a metallization layer (2013-11-12),
10. 8293641 - Nano imprint technique with increased flexibility with respect to alignment and feature shaping (2012-10-23),
11. 8173538 - Method of selectively forming a conductive barrier layer by ALD (2012-05-08),
12. 7998823 - Method for reducing leakage currents caused by misalignment of a contact structure by increasing an error tolerance of the contact patterning process (2011-08-16),
13. 7928004 - Nano imprint technique with increased flexibility with respect to alignment and feature shaping (2011-04-19),
14. 7915170 - Reducing contamination of semiconductor substrates during beol processing by providing a protection layer at the substrate edge (2011-03-29),
15. 7910496 - Technique for forming an interlayer dielectric material of increased reliability above a structure including closely spaced lines (2011-03-22),

Title: Carsten Peters: Innovating Semiconductor Technology

Introduction: Carsten Peters, an accomplished inventor based in Dresden, Germany, has significantly contributed to the field of semiconductor technology. With an impressive portfolio of 28 patents, Peters has established a reputation for pushing the boundaries of innovation in electronic devices and materials.

Latest Patents: Two of Peters' latest patents demonstrate his expertise in semiconductor devices utilizing silicon/germanium (Si/Ge) material. The first patent focuses on semiconductor devices that feature transistor elements with varying germanium concentrations within their channel regions. This design allows for enhanced performance characteristics by optimizing the germanium content within the silicon/germanium mixture. The second patent introduces innovative manufacturing techniques for semiconductor devices that employ Si/Ge active regions, ensuring compatibility with conventional processing strategies while providing flexibility in adjusting the characteristics of P-type transistors.

Career Highlights: Carsten Peters has amassed extensive experience in prominent companies such as Advanced Micro Devices Corporation and Globalfoundries Inc. His tenure at these organizations has enabled him to hone his skills in semiconductor design and manufacturing, positioning him as a leader in his field.

Collaborations: Throughout his career, Peters has had the opportunity to work alongside notable colleagues such as Ralf Richter and Kai Frohberg. These collaborations have played an essential role in enhancing the innovation and development of advanced semiconductor technologies.

Conclusion: Carsten Peters stands out as a pioneering inventor in the semiconductor industry. His patents and collaborative efforts with esteemed colleagues underscore his commitment to advancing technology and improving electronic device performance. As he continues to innovate, Peters undoubtedly shapes the future of semiconductor applications.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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