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For the Inventor, By the Inventor

Austin, TX, United States of America

Byoung W Min

This inventor holds 27 USPTO granted patents and 1 published patent application, primarily in Semiconductor Devices. Top assignees: Freescale Semiconductor,inc., International Business Machines Corporation, Motorola Corporation. Active years: 2003-2016.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Byoung W Min. Retrieved from https://idiyas.com/inventor/byoung-w-min

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 27 

% Patents Active = 59.3

Average Co-Inventor Count = 2.3

ph-index = 11

Forward Citations = 295(Granted Patents)


Location History:

  • Hopewell Junction, NY (US) (2010 - 2012)
  • Austin, TX (US) (2003 - 2016)

Company Filing History:

goldMedal24 out of 5,491 
 
Freescale Semiconductor,inc.
 patents
silverMedal2 out of 166,351 
 
International Business Machines Corporation
 patents
bronzeMedal2 out of 20,290 
 
Motorola Corporation
 patents
where one patent can have more than one assignee

Years Active: 2003-2016

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Areas of Expertise:
Non-Volatile Memory
FinFET
SOI Technology
Transistor Design
Electrical Antifuse
Static Random Access Memory
Schottky Junctions
Body Contact
Integrated Circuits
Vertical Double Gate
Resistive Element
Floating-Body Effect
27 patents (USPTO):Explore Patents
1. 9299856 - Selective gate oxide properties adjustment using fluorine (2016-03-29),
2. 9082650 - Integrated split gate non-volatile memory cell and logic structure (2015-07-14),
3. 9059006 - Replacement-gate-compatible programmable electrical antifuse (2015-06-16),
4. 8975143 - Selective gate oxide properties adjustment using fluorine (2015-03-10),
5. 8901632 - Non-volatile memory (NVM) and high-K and metal gate integration using gate-last methodology (2014-12-02),
6. 8294239 - Effective eFuse structure (2012-10-23),
7. 8237457 - Replacement-gate-compatible programmable electrical antifuse (2012-08-07),
8. 8088657 - Integrated circuit using FinFETs and having a static random access memory (SRAM) (2012-01-03),
9. 7927934 - SOI semiconductor device with body contact and method thereof (2011-04-19),
10. 7858505 - Method of forming a transistor having multiple types of Schottky junctions (2010-12-28),
11. 7820530 - Efficient body contact field effect transistor with reduced body resistance (2010-10-26),
12. 7754560 - Integrated circuit using FinFETs and having a static random access memory (SRAM) (2010-07-13),
13. 7709303 - Process for forming an electronic device including a fin-type structure (2010-05-04),
14. 7648884 - Semiconductor device with integrated resistive element and method of making (2010-01-19),
15. 7517742 - Area diode formation in SOI application (2009-04-14),

Title: Byoung W. Min: Innovator in Semiconductor Technology

Introduction

Byoung W. Min is a prominent inventor based in Austin, TX, specializing in advancements within semiconductor technology. With an impressive portfolio of 27 patents, he has made significant contributions that influence modern electronics and non-volatile memory systems. His work involves innovative methods to improve the properties of gate oxides and develop advanced semiconductor structures.

Latest Patents

Among his latest patents is a groundbreaking method for adjusting selective gate oxide properties using fluorine. This innovation focuses on incorporating fluorine into selective portions of a gate oxide, allowing for enhanced control over its characteristics. In one embodiment, this fluorine addition facilitates oxidation, thereby increasing the thickness of the selective portion. Another embodiment describes how fluorine can lower the dielectric constant of the oxide in these selective regions. This method contributes significantly to reducing program disturb in non-volatile memory applications.

Additionally, Byoung W. Min holds a patent for an integrated split gate non-volatile memory cell and logic structure. This invention outlines a meticulous process for forming a semiconductor structure, which includes creating a select gate and charge storage layer specifically in the non-volatile memory region. The patent also describes the formation of a dummy gate structure in a logic region and the innovative polishing techniques that ensure a coplanar surface alignment between the charge storage layer and the metal logic gate.

Career Highlights

Byoung W. Min has had an illustrious career working for leading technology companies. He has contributed to Freescale Semiconductor, Inc. and the renowned Motorola Corporation, where he honed his expertise in semiconductor development and innovation. His work in these organizations has laid the foundation for many of his inventive breakthroughs in the field.

Collaborations

Throughout his career, Byoung has collaborated with talented colleagues, including notable individuals such as Leo Mathew and Michael A. Mendicino. These collaborations have fostered a creative environment that has led to the development of cutting-edge technologies in the semiconductor industry.

Conclusion

Byoung W. Min's contributions to the field of semiconductor technology are invaluable. With his extensive patent portfolio and collaboration with esteemed colleagues, he continues to drive innovation forward, shaping the future of non-volatile memory and semiconductor structures. His commitment to excellence and invention solidifies his status as a leading figure in technology advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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