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For the Inventor, By the Inventor

Austin, TX, United States of America

Brian W Amick

USPTO Granted Patents = 79 

 

Average Co-Inventor Count = 3.4

ph-index = 11

Forward Citations = 475(Granted Patents)


Inventors with similar research interests:


Location History:

  • Plano, TX (US) (2002)
  • Sunnyvale, CA (US) (2002 - 2006)
  • Ausitn, TX (US) (2006)
  • Austin, TX (US) (2002 - 2007)
  • Brookline, MA (US) (2006 - 2012)
  • Bedford, MA (US) (2013 - 2017)

Company Filing History:

goldMedal70 out of 7,642 
 
Sun Microsystems, Inc.
 patents
silverMedal9 out of 12,867 
 
Advanced Micro Devices Corporation
 patents

Years Active: 2002-2017

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79 patents (USPTO):Explore Patents
1. 9639495 - Integrated controller for training memory physical layer interface (2017-05-02),
2. 9374080 - Method and apparatus for power-up detection for an electrical monitoring circuit (2016-06-21),
3. 9274938 - Dynamic RAM Phy interface with configurable power states (2016-03-01),
4. 8880831 - Method and apparatus to reduce memory read latency (2014-11-04),
5. 8607104 - Memory diagnostics system and method with hardware-based read/write patterns (2013-12-10),
6. 8373447 - Method and apparatus of alternating service modes of an SOI process circuit (2013-02-12),
7. 8358158 - Method and apparatus for phase selection acceleration (2013-01-22),
8. 8356155 - Dynamic RAM Phy interface with configurable power states (2013-01-15),
9. 8274272 - Programmable delay module testing device and methods thereof (2012-09-25),
10. 7263628 - Method and apparatus for receiver circuit tuning (2007-08-28),
11. 7251305 - Method and apparatus to store delay locked loop biasing parameters (2007-07-31),
12. 7193447 - Differential sense amplifier latch for high common mode input (2007-03-20),
13. 7110461 - Technique to enlarge data eyes in wireline communication systems (2006-09-19),
14. 7109767 - Generating different delay ratios for a strobe delay (2006-09-19),
15. 7107475 - Digital delay locked loop with extended phase capture range (2006-09-12),

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