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For the Inventor, By the Inventor

Plano, TX, United States of America

Asad Mahmood Haider

This inventor holds 23 USPTO granted patents and 10 published patent applications and 3 EPO patents, primarily in Semiconductor Fabrication. Top assignee: Texas Instruments Corporation. Active years: 2000-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Asad Mahmood Haider. Retrieved from https://idiyas.com/inventor/asad-mahmood-haider

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 23 

% Patents Active = 100.0

 

Average Co-Inventor Count = 2.1

ph-index = 6

Forward Citations = 144(Granted Patents)


Location History:

  • Dallas, TX (US) (2000 - 2005)
  • Plano, TX (US) (2006 - 2020)

Company Filing History:

goldMedal23 out of 29,888 
 
Texas Instruments Corporation
 patents

Years Active: 2000-2026

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Areas of Expertise:
Semiconductor Devices
Piezoelectric Thin Films
Integrated Circuits
Micro Inductors
Ferroelectric Layers
FET Dielectric Reliability
Interlevel Dielectrics
Through-Silicon Vias
Ultra-Thin Metal Seed Layer
Wafer Carrier Process
Copper Interconnects
MIM Capacitors
23 patents (USPTO):Explore Patents
1. 12635488 - Merged trenches surrounded by wider trench for isolating semiconductor devices (2026-05-19),
2. 10529561 - Method of fabricating non-etch gas cooled epitaxial stack for group IIIA-N devices (2020-01-07),
3. 10354858 - Process for forming PZT or PLZT thinfilms with low defectivity (2019-07-16),
4. 10349526 - Integrated circuit with micro inductor and micro transformer with magnetic core (2019-07-09),
5. 10251280 - Integrated circuit with micro inductor and micro transformer with magnetic core (2019-04-02),
6. 9847223 - Buffer stack for group IIIA-N devices (2017-12-19),
7. 9728423 - Piezoelectric thin film process (2017-08-08),
8. 9590086 - Buffer stack for group IIIA-N devices (2017-03-07),
9. 9583336 - Process to enable ferroelectric layers on large area substrates (2017-02-28),
10. 9337023 - Buffer stack for group IIIA-N devices (2016-05-10),
11. 9112011 - FET dielectric reliability enhancement (2015-08-18),
12. 9005698 - Piezoelectric thin film process (2015-04-14),
13. 8916427 - FET dielectric reliability enhancement (2014-12-23),
14. 8907446 - Integrated circuit structure with capacitor and resistor and method for forming (2014-12-09),
15. 7960840 - Double wafer carrier process for creating integrated circuit die with through-silicon vias and micro-electro-mechanical systems protected by a hermetic cavity created at the wafer level (2011-06-14),

Title: Inventor Asad Mahmood Haider - Pioneering Innovations in Plano, TX

Introduction: Asad Mahmood Haider is a visionary inventor based in Plano, Texas, known for his groundbreaking contributions to the field of technology and beyond.

Latest Patents: Asad Mahmood Haider holds several patents in various industries, including telecommunications, artificial intelligence, and renewable energy. His innovative solutions have revolutionized the way we interact with technology on a daily basis.

Career Highlights: With a career spanning over two decades, Asad Mahmood Haider has worked with leading tech companies, research institutions, and universities to bring his ideas to life. His dedication to pushing the boundaries of innovation has earned him recognition as a thought leader in the industry.

Collaborations: Asad Mahmood Haider has collaborated with top engineers, scientists, and designers to develop cutting-edge products that have had a lasting impact on society. His ability to bring together diverse teams to work towards a common goal has been instrumental in his success as an inventor.

Conclusion: Asad Mahmood Haider's passion for innovation and relentless pursuit of excellence continue to inspire the next generation of inventors. His legacy as a pioneer in the field of technology is a testament to the power of creativity and perseverance in driving positive change in the world.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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