San Jose, CA, United States of America

Arunangshu Kundu

This inventor holds 31 USPTO granted patents and 1 EPO patent, primarily in Field Programmable Gate Arrays. Top assignees: Actel Corporation, Inc., Microsemi Soc Corporation, Other. Active years: 2004-2015.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Arunangshu Kundu. Retrieved from https://idiyas.com/inventor/arunangshu-kundu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 58.1


Average Co-Inventor Count = 2.5

ph-index = 8

Forward Citations = 378(Granted Patents)


Company Filing History:


Years Active: 2004-2015

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Areas of Expertise:
FPGA Packing
Delay Locked Loop
Microcontroller SoC
Routing Architecture
Clock Tree Network
Block Memory
Input/Output FIFO
Non-Uniform Routing
Synchronous FIFO
Transmitters
Receivers
Logic Modules
31 patents (USPTO):Explore Patents

Title: Arunangshu Kundu: Innovating in FPGA Technology

Introduction: Arunangshu Kundu is a prominent inventor based in San Jose, California, who has made significant contributions to the field of field-programmable gate arrays (FPGAs). With a remarkable portfolio of 31 patents, Kundu is recognized for his innovative techniques and methodologies that enhance the performance and efficiency of electronic devices.

Latest Patents: Among his latest patents, Kundu has developed a "Method for Efficient FPGA Packing," which involves a series of complex processes to optimize FPGA devices. This method includes providing a netlist and cluster size information, translating the netlist into a hypergraph, partitioning it, optimizing the Rent characteristic, and effectively placing clusters on the FPGA while routing interconnects. This results in generating a programming bitstream that brings user designs to life.

Another notable patent is the "Delay Locked Loop for an FPGA Architecture." This invention provides a deskew mode for aligning a reference clock within a clock distribution tree. The innovative design includes additional delay elements to ensure proper timing alignment, demonstrating Kundu's ability to improve timing flexibility and efficiency within FPGA architectures.

Career Highlights: Arunangshu Kundu has had a noteworthy career, where he has worked with various reputable companies, including Actel Corporation, Inc. His extensive experience in the industry has played a crucial role in his development as an expert in FPGA technology and innovation.

Collaborations: Throughout his career, Kundu has worked alongside talented individuals, including his coworkers William C. Plants and Nikhil Mazumder. Collaborating with such experienced professionals has likely contributed to his success and the advancement of his inventions.

Conclusion: Arunangshu Kundu stands out as a distinguished inventor whose contributions to FPGA technology are shaping the future of electronic devices. His dedication to innovation is reflected in his extensive patent portfolio, making him a key player within the field. With continued work and collaboration, Kundu is sure to make even further advancements in technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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