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For the Inventor, By the Inventor

Austin, TX, United States of America

Anirudh Devgan

This inventor holds 29 USPTO granted patents, primarily in Integrated Circuit Design. Top assignees: International Business Machines Corporation, Synopsys, Inc., Magma Design Automation, Inc.. Active years: 2000-2017.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Anirudh Devgan. Retrieved from https://idiyas.com/inventor/anirudh-devgan

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 29

% Patents Active = 51.7

Average Co-Inventor Count = 3.0

ph-index = 12

Forward Citations = 760(Granted Patents)


Company Filing History:

goldMedal25 out of 166,351 
 
International Business Machines Corporation
 patents
silverMedal3 out of 2,604 
 
Synopsys, Inc.
 patents
bronzeMedal1 out of 44 
 
Magma Design Automation, Inc.
 patents

Years Active: 2000-2017

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Areas of Expertise:
Lithography Aware Leakage Analysis
Static Memory Performance
Electromagnetic Modeling
Dynamic Stability
Integrated Circuit Design
Leakage Current Sensitivities
Interconnect Delay
Buffer Insertion
Wire Sizing
Timing Analysis
Coupled Noise Estimation
29 patents (USPTO):Explore Patents
1. 9576098 - Lithography aware leakage analysis (2017-02-21),
2. 8572523 - Lithography aware leakage analysis (2013-10-29),
3. 8473876 - Lithography aware timing analysis (2013-06-25),
4. 8001493 - Efficient method and computer program for modeling and improving static memory performance across process variations and environmental conditions (2011-08-16),
5. 7827514 - Efficient electromagnetic modeling of irregular metal planes (2010-11-02),
6. 7561483 - Internally asymmetric method for evaluating static memory cell dynamic stability (2009-07-14),
7. 7558136 - Internally asymmetric methods and circuits for evaluating static memory cell dynamic stability (2009-07-07),
8. 7515491 - Method for evaluating leakage effects on static memory cell access time (2009-04-07),
9. 7483322 - Ring oscillator row circuit for evaluating memory cell performance (2009-01-27),
10. 7434188 - Lithographically optimized placement tool (2008-10-07),
11. 7376001 - Row circuit ring oscillator method for evaluating memory cell performance (2008-05-20),
12. 7304895 - Bitline variable methods and circuits for evaluating static memory cell dynamic stability (2007-12-04),
13. 7302661 - Efficient electromagnetic modeling of irregular metal planes (2007-11-27),
14. 7301835 - Internally asymmetric methods and circuits for evaluating static memory cell dynamic stability (2007-11-27),
15. 7137080 - Method for determining and using leakage current sensitivities to optimize the design of an integrated circuit (2006-11-14),

Title: The Innovative Journey of Anirudh Devgan

Introduction: Anirudh Devgan is a visionary inventor based in Austin, Texas, known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Anirudh Devgan holds several patents in the areas of artificial intelligence, semiconductor technology, and renewable energy solutions, showcasing his diverse range of expertise and creativity.

Career Highlights: With a successful career spanning over two decades, Anirudh Devgan has held key leadership positions in renowned tech companies, driving innovation and spearheading cutting-edge projects that have revolutionized the industry.

Collaborations: Throughout his career, Anirudh Devgan has collaborated with top researchers, engineers, and industry experts, fostering a culture of innovation and excellence that has led to the development of groundbreaking technologies.

Conclusion: Anirudh Devgan's relentless passion for innovation and his commitment to pushing the boundaries of technology make him a true pioneer in the world of inventions, inspiring the next generation of inventors and innovators.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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