IDiyas

For the Inventor, By the Inventor

Sunnyvale, CA, United States of America

Akhilesh Kumar

USPTO Granted Patents = 36 

 

Average Co-Inventor Count = 3.9

ph-index = 12

Forward Citations = 390(Granted Patents)


Location History:

  • Santa Clara, CA (US) (2005 - 2007)
  • Sunnyvale, CA (US) (2002 - 2018)
  • Saratoga, CA (US) (2017 - 2023)

Company Filing History:

goldMedal35 out of 54,664 
 
Intel Corporation
 patents
silverMedal1 out of 832,680 
Other
 patents

Years Active: 2002-2024

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36 patents (USPTO):
1. 12182025 - Flexible cache allocation technology priority-based cache line eviction algorithm (2024-12-31),
2. 11656997 - Flexible cache allocation technology priority-based cache line eviction algorithm (2023-05-23),
3. 11134030 - Device, system and method for coupling a network-on-chip with PHY circuitry (2021-09-28),
4. 9887849 - Reduced wake up delay for on-die routers (2018-02-06),
5. 9798556 - Method, system, and apparatus for dynamic reconfiguration of resources (2017-10-24),
6. 9674114 - Modular decoupled crossbar for on-chip router (2017-06-06),
7. 9418011 - Region based technique for accurately predicting memory accesses (2016-08-16),
8. 9250679 - Reduced wake up delay for on-die routers (2016-02-02),
9. 9223738 - Method, system, and apparatus for dynamic reconfiguration of resources (2015-12-29),
10. 8990506 - Replacing cache lines in a cache memory based at least in part on cache coherency state information (2015-03-24),
11. 8606934 - Method, system, and apparatus for system level initialization by conveying capabilities and identifiers of components (2013-12-10),
12. 8327113 - Method, system, and apparatus for dynamic reconfiguration of resources (2012-12-04),
13. 8190820 - Optimizing concurrent accesses in a directory-based coherency protocol (2012-05-29),
14. 8171121 - Method, system, and apparatus for dynamic reconfiguration of resources (2012-05-01),
15. 8099558 - Fairness mechanism for starvation prevention in directory-based cache coherence protocols (2012-01-17),

Title: A Profile of Innovator Akhilesh Kumar

Introduction: Akhilesh Kumar, based in Sunnyvale, CA, is a prominent inventor with an impressive portfolio of 36 patents. His innovative contributions, particularly in the field of cache memory technology, reflect his expertise and dedication to advancing computational efficiency.

Latest Patents: Among his latest inventions is the "Flexible Cache Allocation Technology Priority-Based Cache Line Eviction Algorithm." This groundbreaking patent discloses a system that optimizes cache line eviction by managing cache lines according to their assigned priorities. The invention employs a last level cache (LLC) system divided into multiple ways, each allocated to different priorities, ensuring efficient management of data requests based on requestor priority and occupancy levels.

Career Highlights: Throughout his career, Akhilesh has made significant contributions by working at renowned companies, including Intel Corporation. His experience in these leading technology firms has equipped him with the skills to design and implement innovative solutions in the realm of computing.

Collaborations: Akhilesh has collaborated with talented professionals, such as Manoj Khare and Lily Pao Looi. These partnerships have facilitated the exchange of ideas and fostered an environment of innovation, leading to the development of cutting-edge technologies.

Conclusion: Akhilesh Kumar stands out as an influential inventor whose work in cache technology represents the forefront of computational innovation. His 36 patents, especially the advanced cache line eviction algorithm, underscore his commitment to improving system performance and efficiency. His collaborations with fellow innovators further highlight the importance of teamwork in driving technological advancements.

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