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For the Inventor, By the Inventor

Milpitas, CA, United States of America

Abu Naser Zainuddin

This inventor holds 22 USPTO granted patents and 3 published patent applications and 2 EPO patents, primarily in Non-Volatile Memory. Top assignee: Sandisk Technologies Inc.. Active years: 2021-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Abu Naser Zainuddin. Retrieved from https://idiyas.com/inventor/abu-naser-zainuddin

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 22 

% Patents Active = 100.0

 

Average Co-Inventor Count = 3.3

ph-index = 1

Forward Citations = 8(Granted Patents)


Company Filing History:

goldMedal22 out of 4,966 
 
Sandisk Technologies Inc.
 patents

Years Active: 2021-2026

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Areas of Expertise:
NAND Memory
Current Consumption
Voltage Adjustment
Program Verify
Charge Pump
Temperature Compensation
Read Disturb
Bit Line
Programming Optimization
Voltage Ramp Rate
Peak Current
Memory Device
22 patents (USPTO):Explore Patents
1. 12614598 - Fake fast plane detection in early program termination (2026-04-28),
2. 12603135 - Uniform GIDL current during NAND erase (2026-04-14),
3. 12596495 - Power saving during open block read with large block openness (2026-04-07),
4. 12555640 - Suppression of peak ICC during block selection in non-volatile memories (2026-02-17),
5. 12524177 - Automatic bit line voltage and bit line voltage temperature compensation adjustment for non-volatile memory apparatus current consumption reduction (2026-01-13),
6. 12494260 - Program verify word line ramping delay for lower current consumption mode (2025-12-09),
7. 12475959 - Non-volatile memory with current detection circuit (2025-11-18),
8. 12462877 - Program pulse duration increase for NAND program failure (2025-11-04),
9. 12456531 - Separate peak current checkpoints for closed and open block read ICC countermeasures in NAND memory (2025-10-28),
10. 12417809 - Open block read ICC reduction (2025-09-16),
11. 12394491 - Apparatus and method for selectively reducing charge pump speed during erase operations (2025-08-19),
12. 12387802 - Non-volatile memory with lower current program-verify (2025-08-12),
13. 12354664 - Non-volatile memory with loop dependant ramp-up rate (2025-07-08),
14. 12346578 - Distributed temperature sensing scheme to suppress peak Icc in non-volatile memories (2025-07-01),
15. 12176032 - Word line dependent pass voltage ramp rate to improve performance of NAND memory (2024-12-24),

Title: Inventor Abu Naser Zainuddin

Introduction: Abu Naser Zainuddin is a prolific inventor based in Milpitas, CA (US) known for his groundbreaking contributions to various fields.

Latest Patents: Abu Naser Zainuddin holds several patents in the areas of technology, healthcare, and consumer electronics, showcasing his diverse range of expertise.

Career Highlights: With a career spanning over two decades, Abu Naser Zainuddin has worked with leading tech companies, research institutions, and universities to develop innovative solutions that have had a significant impact on society.

Collaborations: Throughout his career, Abu Naser Zainuddin has collaborated with top inventors, patent attorneys, and companies to bring his ideas to life, fostering a culture of innovation and excellence.

Conclusion: Abu Naser Zainuddin's passion for innovation and his relentless pursuit of excellence continue to inspire the next generation of inventors and shape the future of technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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