The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 14, 2026
Filed:
Jan. 17, 2024
Sandisk Technologies, Inc., Milpitas, CA (US);
Jiahui Yuan, Fremont, CA (US);
Sarath Puthenthermadam, San Jose, CA (US);
Abu Naser Zainuddin, Milpitas, CA (US);
Sandisk Technologies, Inc., Milpitas, CA (US);
Abstract
Technology for gate induced drain leakage (GIDL) erase of NAND strings. The drain-to-gate voltage of a source side select transistor (or transistors) is trimmed to compensate for different physical characteristics of the NAND strings in different regions of a memory system. The drain-to-gate voltage generates a GIDL current at the source end of a NAND string during a GIDL erase. The memory system uses different magnitudes for the drain-to-gate voltage applied to source side select transistor(s) on NAND strings in different regions of the memory system to provide for more uniform GIDL current during erase.