For the Inventor, By the Inventor

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Fremont, CA, United States of America

Waferscale Integration, Inc.

USPTO Granted Patents = 54

Forward Citations = 1,551

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25 inventors (with patents filed for the assignee):

Boaz Eitan (30 out of 129 patents)

Reza Kazerounian (15 out of 15 patents)

Yoram Cedar (7 out of 38 patents)

4. John H Pasternak (6 out of 6 patents)

5. Rustom F Irani (5 out of 5 patents)

6. Alexander Shubat (4 out of 15 patents)

7. Yaron Slezak (4 out of 6 patents)

8. Syed Ali (4 out of 4 patents)

9. Manik Advani (3 out of 17 patents)

10. Arye Ziklik (3 out of 11 patents)

11. Alex Shubat (3 out of 13 patents)

12. Chang Hee Hong (3 out of 3 patents)

13. Mark Michael Nelson (2 out of 8 patents)

14. Barmak S Sani (2 out of 2 patents)

15. Anirban Roy (2 out of 2 patents)

Core Competencies:

Charge Pump Controller

Programmable Sense Amplifier

Macrocell

Row Decoder

Dual Bit Memory Cell

Flash Memory Array

EPROM Array

Low Power Ring Oscillator

Self Adjusting Sense Amplifier

High Voltage Generator

Nonvolatile Transistor Structure

Floating Gate Memory

54 patents: Sort by Forward Citations

1. 6115272 - Duty cycle based charge pump controller (2000-09-05),

2. 6072733 - Programmable sense amplifier delay (PSAD) circuit which is matched to (2000-06-06),

3. 6066961 - Individually accessible macrocell (2000-05-23),

4. 6055203 - Row decoder (2000-04-25),

5. 5982196 - Programmable logic device producing a complementary bit line signal (1999-11-09),

6. 5949711 - Dual bit memory cell (1999-09-07),

7. 5917743 - Content-addressable memory (CAM) for a FLASH memory array (1999-06-29),

8. 5912560 - Charge pump circuit for voltage boosting in integrated semiconductor (1999-06-15),

9. 5910016 - Scalable EPROM array (1999-06-08),

10. 5886561 - Backup battery switch (1999-03-23),

11. 5862076 - Fast EPROM array (1999-01-19),

12. 5838046 - Operating method for ROM array which minimizes band-to-band tunneling (1998-11-17),

13. 5834947 - Microcontroller accessible macrocell (1998-11-10),

14. 5834859 - Battery backed configurable output buffer (1998-11-10),

15. 5801457 - Unit for maintaining information regarding the state of a device during (1998-09-01),

Company Overview

Waferscale Integration, Inc., based in Fremont, CA, specializes in advanced memory device technology. The company focuses on the development and manufacturing of innovative solutions such as charge pump controllers, programmable sense amplifiers, and dual bit memory cells. Their expertise extends to flash memory arrays and EPROM arrays, addressing the growing demands for efficient and high-performance memory solutions. With a commitment to low power consumption and cutting-edge design, Waferscale Integration is positioned at the forefront of memory technology advancements.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 13 2026

54 Patents

#47 in Fremont, CA

#1,545 in California

#6,560 in US

#13,126 in the World

Fremont, CA, United States of America

Waferscale Integration, Inc.

Forward Citations = 1,551

25 inventors:

Boaz Eitan (30 out of 129 patents)

Reza Kazerounian (15 out of 15 patents)

Yoram Cedar (7 out of 38 patents)

4. John H Pasternak (6 out of 6 patents)

5. Rustom F Irani (5 out of 5 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Waferscale Integration, Inc.. Retrieved from https://idiyas.com/company/waferscale-integration

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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