The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 10, 1998
Filed:
Nov. 01, 1996
Applicant:
Inventors:
Yoram Cedar, Cupertino, CA (US);
Arye Ziklik, Sunnyvale, CA (US);
Assignee:
Waferscale Integration Inc., Fremont, CA (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
326 39 ; 326 41 ;
Abstract
A circuit connectable to a microcontroller having an address bus, a data bus, a read line and a write line including a programmable logic device (PLD) array, at least one input pin and at least one databus macrocell. The input pin is connected to the PLD array and is connectable to the address bus. The databus macrocell is connected to the PLD array and to an external unit and is also connectable to the data bus, the read line and the write line. The databus directly accesses the databus macrocell.