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Bristol, United Kingdom

Pulsic Limited

USPTO Granted Patents = 41

% Expired Patents = 26.8

Trademarks = 1

Forward Citations = 431

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12 inventors (with patents filed for the assignee):

Mark Waller (29 out of 29 patents)

Jeremy Birch (23 out of 23 patents)

Graham Balsdon (22 out of 22 patents)

4. Tim Parker (17 out of 17 patents)

5. Mark Williams (17 out of 17 patents)

6. Fumiaki Sato (12 out of 58 patents)

7. Paul Clewes (7 out of 7 patents)

8. Liang Gao (7 out of 7 patents)

9. Jonathan Longrigg (7 out of 7 patents)

10. Fumiako Sato (5 out of 5 patents)

11. Graham Baldsdon (2 out of 2 patents)

12. Robert Eisenstadt (1 out of 4 patents)

Core Competencies:

Integrated Circuit

Routing

Automated Layout

High-Speed Router

Place-and-Routing

Variable Width Interconnect

Compaction

Parasitic Constraints

Steiner Tree

Design Automation

Pattern Matching

Current Density Rules

41 patents: Sort by Forward Citations

1. 12032893 - Optimizing place-and-routing using a random normalized polish expression (2024-07-09),

2. 11853671 - Filling vacant areas of an integrated circuit design (2023-12-26),

3. 11748538 - Automated analog layout (2023-09-05),

4. 11281828 - Automated analog layout (2022-03-22),

5. 11200363 - Optimizing place-and-routing using a random normalized polish expression (2021-12-14),

6. 11126779 - High-speed shape-based router (2021-09-21),

7. 11030374 - Filling vacant areas of an integrated circuit design (2021-06-08),

8. 10783292 - Automated analog layout (2020-09-22),

9. 10769343 - High-speed shape-based router (2020-09-08),

10. 10726184 - Method for optimizing place-and-routing using a random normalized polish expression (2020-07-28),

11. 10691858 - Filing vacant areas of an integrated circuit design (2020-06-23),

12. 10346577 - High-speed shape-based router (2019-07-09),

13. 9940421 - Method for optimizing place-and-routing using a random normalized polish expression (2018-04-10),

14. 9767242 - Filling vacant areas of an integrated circuit design (2017-09-19),

15. 9245082 - High-speed shape-based router (2016-01-26),

Company Overview

Pulsic Limited, based in Bristol, UK, specializes in advanced integrated circuit design solutions. The company focuses on innovative technologies for place-and-routing optimization, automated analog layout, and high-speed shape-based routing. Pulsic's expertise extends to clock tree generation and variable width interconnect, enhancing the efficiency and performance of electronic designs. By integrating parasitic constraint rules and automating routing nets, Pulsic empowers engineers to streamline their design processes and achieve superior results in complex circuit layouts.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 6 2026

41 Patents

#12 in Bristol

#431 in United Kingdom

#16,686 in the World

Bristol, United Kingdom

Pulsic Limited

Forward Citations = 431

12 inventors:

Mark Waller (29 out of 29 patents)

Jeremy Birch (23 out of 23 patents)

Graham Balsdon (22 out of 22 patents)

4. Tim Parker (17 out of 17 patents)

5. Mark Williams (17 out of 17 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Pulsic Limited. Retrieved from https://idiyas.com/company/pulsic

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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