This inventor holds 7 USPTO granted patents. Top assignee: Pulsic Limited. Active years: 2018-2024.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2018-2024
Title: Innovations by Inventor Liang Gao
Introduction
Liang Gao is a prominent inventor based in Gateshead, GB. He has made significant contributions to the field of integrated circuit design, holding a total of seven patents. His work focuses on optimizing layout processes and improving circuit performance.
Latest Patents
One of Liang Gao's latest patents is titled "Optimizing place-and-routing using a random normalized polish expression." This innovation enhances the implementation of integrated circuit layouts by making them more compact, reducing parasitics, and improving performance characteristics such as power, frequency, propagation delay, gain, and stability. The technique generates solutions based on random normalized polish expressions while considering cost factors related to interconnect routing. Another notable patent is "Automated analog layout," which introduces a tool that creates multiple electrically correct layouts from a single input schematic. This tool allows designers to explore various layout options quickly, significantly speeding up the design cycle and providing early access to parasitic simulations.
Career Highlights
Liang Gao is currently employed at Pulsic Limited, where he continues to innovate in the field of electronic design automation. His work has been instrumental in advancing the capabilities of layout tools, making them more efficient and effective for designers.
Collaborations
Liang collaborates with talented individuals such as Paul Clewes and Jonathan Longrigg, contributing to a dynamic work environment that fosters innovation and creativity.
Conclusion
Liang Gao's contributions to integrated circuit design through his patents and work at Pulsic Limited highlight his role as a key innovator in the field. His advancements are paving the way for more efficient electronic design processes.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
