Glos, United Kingdom

Mark Williams

This inventor holds 17 USPTO granted patents, primarily in Integrated Circuit Routing. Top assignee: Pulsic Limited. Active years: 2006-2015.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Mark Williams. Retrieved from https://idiyas.com/inventor/mark-williams

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 64.7

Average Co-Inventor Count = 6.0

ph-index = 11

Forward Citations = 300(Granted Patents)


Company Filing History:


Years Active: 2006-2015

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Areas of Expertise:
Clock Tree Generation
Routing System
Variable Width Interconnect
Parasitic Constraint Rules
Automation
Spine Routing
Current Density Rules
Steiner Tree
Shape-Based Routing
Integrated Circuit Design
17 patents (USPTO):Explore Patents

Title: The Innovative Contributions of Mark Williams

Introduction

Mark Williams is a prominent inventor based in Glos, GB, known for his significant contributions to the field of integrated circuit design. With a total of 17 patents to his name, Williams has developed innovative techniques that enhance the efficiency and performance of electronic systems.

Latest Patents

Among his latest patents, Williams has introduced a technique for clock tree generation and routing. This method utilizes a spine-based architecture to create small-scale clock trees while employing clustered placement. The approach aims to minimize clock skew, reduce the number of clock buffers, and optimize routing resources. Additionally, it allows users to customize small, efficient clock trees, ultimately leading to reduced clock power consumption. Another notable patent is his automatic routing system with variable width interconnect. This system automatically routes interconnects in integrated circuit designs, varying the width of interconnect lines based on factors such as current handling, reliability, and voltage drops. This innovative routing system can employ either a gridded or gridless approach, providing flexibility in design.

Career Highlights

Williams is currently associated with Pulsic Limited, where he continues to push the boundaries of technology in integrated circuit design. His work has been instrumental in developing solutions that address the challenges faced in modern electronic systems.

Collaborations

Throughout his career, Williams has collaborated with notable colleagues, including Mark Waller and Tim Parker. These partnerships have fostered an environment of innovation and creativity, leading to the development of groundbreaking technologies.

Conclusion

Mark Williams stands out as a key figure in the realm of integrated circuit design, with his patents reflecting a commitment to innovation and efficiency. His contributions continue to shape the future of electronic systems.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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